Scheduler for a multiple computer system4318173Abstract A scheduler for selecting and scheduling the tasks to be executed by a computer in a multiple computer system is disclosed. One scheduler is associated with each computer, and the schedulers coordinate their operation by sending and receiving messages. Each scheduler comprises a status table (604) storing the status of each task assigned to its computer, and a scheduling status table (608) storing the tasks recently selected for execution by the computer. The scheduler further includes a record data ready module (600) which records in the status table (604) the reception of the data variables required for the execution of each task. A completed task recorder (612) records which tasks have been executed by itself or any other computer in the system. An unselected/selected task recorder records the selection and unselection of tasks by other computers. A task unselector records the tasks which have been unselected by itself. A task selector (610) selects from the status table and records in the scheduling status table the highest priority task ready for execution which has not been selected by any computer in the system. A task releaser (618) forwards the selected task for execution each time the computer signals the completion of the preceding scheduled task. Claims What is claimed is: Description CROSS REFERENCE
TABLE I
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TABLES USED IN THE SYSTEM
TABLE ELEMENT
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Redundant Data Fault Handler 204
Computer Status Fault Handler 204
Sampling Data Fault Handler 204
Fault State Fault Handler 204
Scheduling Status Scheduler 206
Task Status Scheduler 206
Data Values Task Communicator 208
Internal Watch-Dog Timer
Task Communicator 208
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MESSAGES The operation of the Fault-Tolerant Multi-Computer System requires that various items of information be transmitted in messages between the multiple Computers in the system. Table II-A is a tabulation of the message types used in the following description of the system. Each message is assumed to comprise a fixed integer number of 8-bit bytes or characters. It is recognized that the various items of information in the messages listed in Table II-A may be presented in various other ways and may use different numbers of bytes and/or bits. The message types given in Table II-A, and their contents, represent a specific format that may be used.
TABLE II-A
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INTER-COMPUTER MESSAGES
Message Type Byte No. Byte Contents
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Task Data Value
1 Message Type
2 Sending Computer
3 Data I.D.
4 Sequence number
5-12 Data Value
13-14 Error Detecting Code
Redundant Data
1 Message Type
Value 2 Sending Computer
3 Data I.D.
4 Sequence Number
5-12 Data Value
13-14 Error Detecting Code
Task Completed/
1 Message Type
Started 2 Sending Computer
3 Completed Task
4 Completed Execution
Number
5 Started Task
6 Started Execution
Number
7-8 Error Detecting Code
Task Unselected/
1 Message Type
Selected 2 Sending Computer
3 Unselected Task
4 Unselected Execution
Number
5 Selected Task
6 Selected Execution
Number
7-8 Error Detecting Code
Error 1 Message Type
2 Sending Computer
3 Faulty Computer
4 Error Type Code
5-6 Null (not used)
7-8 Error Detecting Code
Sampling Number
1 Message Type
2 Sending Computer
3 Sampling Number
4 Starting Flag
5-6 Excluded Bits
7-8 Error Detecting Code
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The first two and last two bytes of all the inter-computer messages listed on Table II-A contain similar information. The first and second bytes of each message identify the message type and sending Computer respectively. The last two bytes are an error detecting code determined and checked over all other bytes of the message. The form of error detecting code used depends upon the communication link protocol selected; a 16 bit Cyclic Redundancy Check (CRC) code or any other code having similar error detection coverage may be used. In addition to these error detecting code bytes, each byte or character may be transmitted with additional bits which are used solely for error detection and/or correction. The error detecting bits and bytes are generated by the Transmitter 212 and checked by the Receivers 202, and are not passed along with the rest of the message for subsequent handling in the Operations Controller. Task Data Value and Redundant Data Value messages differ only in whether or not the data values contained in the messages are redundantly computed by more than one Computer, and thus must be processed by majority voting as discussed hereinafter. Task Data Value Messages and Redundant Data Value Messages are sent by a Computer after completing the execution of a task, in which new values for some task data variables have been computed. A Task Data Value or Redundant Data Value message comprises 14 bytes as indicated on Table II-A. The first byte identifies the message as a Task Data Value or Redundant Data Value message, which contains a new data variable value. The second byte identifies the Computer in which the new data value was computed. The third byte identifies the particular data variable for which a new value was computed by the sending Computer. The fourth byte provides the sequence number of the new data value. The sequence number distinguishes this particular value of the data variable from previous and subsequent values of the same data variable, computed by the same Computer or by any other Computer in the system. The sequence numbers are assigned sequentially (0 to 255 decimal) in circular fashion, i.e., 0 follows 255. The next 8 bytes, bytes 5 through 12, contain the new value for the data variable. The final two bytes contain the error detecting code. The Task Completed/Started message is sent after a task has been completed, and follows the Task Data Value and Redundant Data Value messages from the completed task. The Task Completed/Started message informs the other Computers in the system that the sending Computer has completed the execution of the task identified in Byte 3, and identifies the new task started in Byte 5. Bytes 4 and 6 give the execution numbers of the completed and started tasks, respectively. Each execution number distinguishes the particular execution of a task from previous and subsequent executions of the same task. The execution number corresponds to the sequence number of the data values being used or being computed in the execution of the task. The Task Unselected/Selected message is sent when the Scheduler has selected the next task to be executed by the Applications Computer. Bytes 5 and 6 of the Task Unselected/Selected message identify the newly selected task and its execution number. Bytes 3 and 4 identify the previously selected task and its execution number; this task is now unselected and replaced by the selected task. When a Computer starts executing its selected task, it tentatively selects a known, fixed task, namely the Health Check task, so that a task is always selected. The selection of this Health Check task is not explicitly communicated to other Computers; its selection is assumed by all Computers when a Task Completed/Started message is received. Later, if the Computer selects another task, it sends out a Task Unselected/Selected message. Bytes 3 and 4 identify the unselected Health Check task, and bytes 5 and 6 identify the task selected in place of the Health Check task. If prior to initiating the execution of the selected task, the Operations Controller receives a Task Unselected/Selected message from another Computer having a higher priority, indicating that it also has selected the same task (not Health Check) with the same execution number, the Operations Controller of the lower priority Computer unselects the task and selects a new task. The Operations Controller then generates a Task Unselected/Selected message informing all of the other Operations Controllers that it has unselected the previously selected task and identifying the newly selected task and its execution number. An Error message is generated when an Operations Controller detects an error in a message received from another Computer, or detects an error committed by its own Computer. The first byte identifies the message as an Error message. The second byte identifies the Computer which detected the error, while the third byte identifies the Computer from which the erroneous message originated. The fourth byte contains an error type code which identifies the type of error detected. The fifth and sixth bytes contain null codes (not used). As previously indicated, bytes 7 and 8 contain an error detecting code. It should be noted that null bytes are included in some messages so that most message types are the same length and thus simplify message handling. Alternately, these null bytes could be omitted from the messages. A Sampling Number message is sent by each Computer at the end of each sampling period. The first byte identifies the message type, and the second byte identifies the Computer sending the message. The third byte provides the new sampling number, which distinguishes the present sampling period from previous and subsequent sampling periods. Like the data value sequence numbers and task execution numbers, the sampling numbers are assigned sequentially (from 0 to 255 decimal) in circular fashion, i.e., 0 follows 255. The fourth byte is a starting flag signifying if the sending Computer is starting or restarting operation. The fifth and sixth bytes contain one bit for each possible Computer in the system, and indicate if the Computer associated with each bit is currently excluded by the sending Computer or not. The seventh and eighth bytes contain the error detecting code. As previously stated, these messages are transmitted between the multiple Computers of the system. The same messages are also transmitted between some subsystems of the Operations Controller. Within one Operations Controller, not all bytes of a message may be transmitted. In particular, the error detecting code bytes are not communicated beyond the receivers. Within each Operations Controller, additional internal messages are used to communicate information between the subsystems or modules of the Operations Controller. These messages are listed in Table II-B and will be discussed in conjunction with the modules that produce and/or use such internal messages.
TABLE II-B
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INTERNAL MESSAGES
BYTE
MESSAGE TYPE NO. BYTE CONTENTS
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EXCLUDE 1 MESSAGE TYPE
COMPUTER . . . . . .
2 EXCLUDED COMPUTER
3-4 EXCLUDED BITS
INITIATE 1 MESSAGE TYPE
SPECIAL TASKS
2 TASK TYPE
3 EXECUTION NUMBER
RESTART . . . . . . . .
1 MESSAGE TYPE
DISPATCH TASK . .
1 MESSAGE TYPE
2 TASK
3 EXECUTION NUMBER
RELEASE TASK . .
1 MESSAGE TYPE
2 COMPLETED TASK
3 COMPLETED EXECUTION
NUMBER
4 STARTED TASK
5 STARTED EXECUTION
NUMBER
TASK DONE . . . . . .
1 MESSAGE TYPE
2 TASK
RECORD ERROR . .
1 MESSAGE TYPE
2 NEW FAULTY COMPUTER
3 ERROR INDICATOR
TASK INPUT . . . . .
1 MESSAGE TYPE
2-3 TASK ADDRESS
THE FOLLOWING SET OF BYTES ARE REPEATED FOR
EACH DATA VARIABLE USED AS A TASK INPUT. SEE
TASK COMMUNICATOR DISCUSSION FOR MORE
DETAIL.
4-11 INPUT VALUE
12 ACTUAL DELAY INTEGER
TASK OUTPUT . . . .
1 MESSAGE TYPE
THE FOLLOWING SET OF BYTES ARE REPEATED FOR
EACH DATA VARIABLE COMPUTED AS A TASK
OUTPUT. SEE TASK COMMUNICATOR DISCUSSION
FOR MORE DETAIL.
2 DATA I.D.
3 REDUNDANT VALUE
4-11 OUTPUT VALUE
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Fault Handler The details of the Fault Handler 204 are shown in FIG. 5. The Fault Handler 204 comprises a Message Format Checker 216, Reasonable Limits Checker 218, Redundant Value Voter 220, Message Sequence Checker 222, Execution Time Checker 224, Synchronizer 226, Fault Tolerator 228, Fault Status Display Panel 230, and Start Fault Handler Module 231. The Message Format Checker 216 receives the outputs from the Receivers 202a through 202k, merges the messages received into a single stream of data, and performs selected message format checks. The Message Format Checker 216 checks each received message to determine if the message type is valid, if the sending Computer identified in the message corresponds to the Receiver that received the message, and if the error detecting code is correct (checked in conjunction with the Receivers). A Record Error message is sent to a Fault Tolerator 228 when the message type is not valid, when the Computer identified in the message does not correspond to the Receiver receiving the message, or when an error is detected through use of the error detecting code. The error-free messages passed by the Message Format Checker are received by one of a plurality of error detection modules or checkers, such as the Reasonable Limits Checker 218, Redundant Value Voter 220, Message Sequence Checker 222 or Execution Time Checker 224. The error detection module to which a message is communicated is determined by the message type; each message is usually further checked for errors by only one of the error detection modules. The Reasonable Limits Checker 218 checks if the data value of a Task Data Value message is between predetermined minimum and maximum limits. It generates a Record Error message when the data value is outside the predetermined limits. Error-free Task Data Value messages are forwarded to the Fault Tolerator 228. The Redundant Value Voter 220 receives the Redundant Data Value messages and generates a "voted data value" when a predetermined number of Redundant Data Value messages are received having the same sequence number and same data value for a given task data variable. The "voted data value" is the value of that data variable that will be used in the execution of any subsequent task requiring this data. The "voted data value" obtained is communicated in a Redundant Data Value message forwarded to the Task Communicator via the Fault Tolerator and Scheduler. After the "voted data value" is determined, a Record Error message is generated for any received message having a data value which does not agree with the "voted data value" for that sequence number of that data variable. The Execution Time checker 224 comprises a plurality of "watch-dog timers", one for each Computer 10. Each "watch-dog timer" is started in response to a Task Completed/Started message received from the associated Computer. The "watch-dog timer" monitors the execution time of the task started by that Computer. A Record Error message is generated when the "watch-dog timer" expires before a subsequent Task Completed/Started message is received, which indicates that the previously started task has been completed and another task has been started. Expiration of the watch-dog timer indicates that the task was improperly executed. The Task Completed/Started messages are always forwarded to the Message Sequence Checker 222. The Message Sequence Checker 222 checks that the Task Completed/ Started and Task Unselected/Selected messages are received from each Computer in a correct sequential order. For example, a Task Completed/Started message, indicating that a particular task has been started, should have been preceded by a Task Unselected/Selected message from the same Computer indicating that the same task with the same execution number had been selected. In a like manner, a Task Completed/Started message should be preceded by a Task Completed/Started message from the same Computer in which the started task and execution number of the first message are the same as the completed task and execution number in the subsequent message. If the task numbers or execution numbers do not agree, a Record Error message is generated. Error-free Task Unselected/Selected and Task Completed/Started messages are forwarded to the Fault Tolerator. Each Record Error message generated by the various fault detection modules is sent to the Fault Tolerator 228. Each Record Error message includes the identity of the Computer 10 which sent the message, and an identification of the particular error detected. The error-free Sampling Number messages, after passing through the Message Format Checker, are received by the Synchronizer 226. The Synchronizer generates "initiate input/output tasks" messages in synchronization with the Synchronizer modules in other Computers in the system. At the end of each sampling period, the Synchronizer generates a Sampling Number message containing the current sampling number of the associated Computer. The Sampling Number messages are sent to all of the Computers in the system via the Transmitter 212, and are used to synchronize operations of like Synchronizers 226 in the other Computers 10. In the event that Synchronizer's own Computer is starting after a momentary power interruption or other failure, the Synchronizer will also generate an "initiate start-up task" message and "initiate fail-safe task" messages. The "initiate input/output tasks", "initiate start-up task" and "initiate fail-safe task" messages are internal messages used by the Synchronizer's own Operations Controller. These messages are sent to the Scheduler 206 and are not communicated to the other Computers. Each of these messages is a particular version of the Initiate Special Tasks message listed in Table II-B. The "initiate input/output tasks" message is sent to the Scheduler 206 to initiate scheduling of the input/output tasks assigned to its own Computer, in synchronization with all of the other Computers in the system. These input/output tasks perform sampling of system inputs and outputs, where the sampling must be synchronized between Computers. The sampling number generated by the Synchronizer becomes the execution number of the input/output tasks. The "initiate start-up task" message initiates scheduling of the system start-up task(s) assigned to its own Computer, in synchronization with all the other Computers in the system. These start-up tasks perform any functions needed to properly start the operation of the other application tasks. Finally, the "initiate fail-safe task" message initiates scheduling of the fail-safe task or tasks assigned to the Synchronizer's own Computer. The fail-safe tasks send out "safe" data values during a start or restart, to all actuators and displays connected to the Computer. In addition, the Synchronizer 226 and Fault Tolerator 228 generate Restart messages when operation of the associated Operations Controller needs to be restarted. The Restart messages initiate start-up procedures within the Scheduler 206, Task Communicator 208, and Fault Handler 204, which initializes the variable data used within those units. Within the Fault Handler, the Restart messages are sent to the Start Fault Handler Module 231, which initialize variable data within the checkers and the Fault Tolerator 228. The error-free Task Data Value messages, the Redundant Data Value messages which convey a "voted data value", the Task Completed/Started messages, the Task Unselected/Selected messages, and the Error messages are received by the Fault Tolerator 228. The Fault Tolerator also receives the Record Error messages generated by the Message Format Checker 216, Reasonable Limits Checker 218, Redundant Value Voter 220, Execution Time Checker 224, Message Sequence Checker 222, and Synchronizer 226. The function of the Fault Tolerator 228 is to pass on to the Scheduler 206 only those error-free messages received from Computers which are not deemed to be faulty. The Fault Tolerator maintains, for each Computer in the system, an indication of whether or not that Computer is currently deemed to be faulty. Whenever an error-free message is received from a Computer which is not considered faulty, that message is forwarded to the Scheduler. Messages from faulty Computers and errorneous messages are discarded. These actions are performed for Task Data Value, Task Completed/Started, and Task Unselected/Selected messages. Redundant Data Value messages which convey a "voted data value" are always forwarded to the Scheduler, even though the sending Computer may be deemed faulty. Error and Record Error messages are used and not forwarded by the Fault Tolerator. When a Record Error message is received from the Message Format Checker 216, Reasonable Limits Checker 218, Redundant Value Voter 220, Message Sequence Checker 222, Execution Time Checker 224, or Synchronizer 226, the Computer which sent the erroneous message is recorded as being faulty, and an Error message is generated identifying the Computer which sent the message. The Error message is sent out to all Computers via the Transmitter 212. An internal Exclude Computer message identifying the faulty Computer is sent to the Scheduler 206. The Fault Tolerator 228 also responds to the Error messages receives from other Computers, and will conclude that a Computer is faulty when a predetermined number of Computers have sent Error messages identifying that particular Computer as faulty, even though an error has not been detected by an error detection module in its own Computer. As before, when the Fault Tolerator decides that a Computer is now faulty, it sends an Exclude Computer message to the Scheduler. If the number of Computers sending Error messages identifying a particular Computer as faulty is less than the predetermined number, the Computer is assumed to be healthy since the received Error message(s) may be the result of malfunctions in the Computers sending the Error messages of their associated communication links. The Computer or Computers which sent these Error messages will discard messages from the Computer deemed faulty; however, the remaining Computers will treat that same Computer as healthy and will accept the messages as if no Error messages were received. In all cases where one of the Computer's own checkers or the Synchronizer send an internal record Error message indicating a detected error or fault, that Computer will deem the Computer faulty and will discard all messages received from that Computer; this continues until it is concluded that the fault was temporary and the faulty Computer has recovered. Although the Fault Tolerator 228 will discard messages received from Computers deemed to be faulty, the Message Format Checker 216, Reasonable Limits Checker 218, Redundant Value Voter 220, Message Sequence Checker 222, Execution Time Checker 224, and Synchronizer 226 will continue to check each message received from all Computers. The Fault Tolerator continues to monitor the messages received from the Computer deemed to be faulty. The Fault Tolerator will decided that a Computer is no longer faulty when, during a predetermined time period, its own checkers do not detect an error and simultaneously the number of Computers generating Error messages identifying the faulty Computer is less than the required predetermined number. When it is determined that a Computer is no longer faulty, the Fault Tolerator will generate an "Exclude Computer" message which shows that the previously excluded Computer is no longer excluded. The "Exclude Computer" message is communicated to the Scheduler 206, where it cancels the current exclusion status of the identified Computer, and the previously excluded Computer is thus readmitted to full participation in the system. The Fault Tolerator 228 further generates signals activating a Fault Status Display Panel 230 identifying the Computers deemed to be faulty or excluded. The Fault Status Display Panel 230 may be an externally mounted display panel readily visible to the operator, and/or may be placed inside the Computer cabinet adjacent to the particular Operations Controller hardware. Each Computer in the system has its own display panel, and each display panel has at least two lamps or indicators for each Computer in the system. Both of the lamps are activated when the corresponding Computer has been deemed to be faulty by the Operations Controller associated with the particular display, and the faulty Computer is presently excluded from the system. The first lamp is turned "off" when the Computer is readmitted; however, the second lamp is left on indicating that the Computer had previously been excluded. The in-cabinet mounting of the display panel is desirable, since the display will be conveniently available to service personnel during maintenance or servicing of the system. The operation of the Fault Handler 204 is as follows: Messages from the Computers in the Fault-Tolerant Multi-Computer System are received by the individual Receivers 202 connected to the respective communication links. The Receivers 202 check the error detection code, then length of the message, etc. The received message is then forwarded to the Message Format Checker 216, along with information identifying the Receiver which received the message. If an error is detected by a Receiver, information identifying the type of error detected is communicated to the Message Format Checker 216. Because the messages are randomly received at the individual Receivers 202, and may be received at a rate too fast for immediate processing by the Message Format Checker 216, the messages are placed in a temporary storage buffer associated with each Receiver, until they can be checked by the Message Format Checker. Each temporary storage buffer is able to store about ten messages at any time. Each received message contains additional bytes or bits of information, such as the message error detecting code, start of message and end of message codes, and character error detecting/correcting codes, which are only used by the Receivers. These additional bits of information are stripped from the message before it is forwarded to the buffer and Message Format Checker 216. The Message Format Checker 216 interrogates the buffers associated with each Receiver 202 in a cyclical manner, and checks each received message. It checks if an error was detected by the Receiver, if the message type is a valid message type, and if the Receiver which received the message is associated with the particular Computer which originated the message. If the Message Format Checker detects an error, it sends a Record Error message to the Fault Tolerator 228. If no error is detected, the received message is forwarded to the appropriate Fault Handler module. Subsequent operation of the Fault Handler depends upon the message type. Operation will thus be discussed for each message type. Error-free Task Data Value messages, passed by the Message Format Checker 216, are forwarded to the Reasonable Limits Checker 218. The Reasonable Limits Checker checks each Task Data Value message and forwards it to the Fault Tolerator 228 if no error is detected. The Fault Tolerator checks if the Computer which sent the message is currently considered to be faulty. If that Computer is not faulty, the Task Data Value message is forwarded to the Scheduler 206; otherwise, the message is discarded. If the Reasonable Limits Checker detects an error, it sends a Record Error message to the Fault Tolerator 228. Each error-free Redundant Data Value message, passed by the Message Format Checker 216, is forwarded to the Redundant Value Voter 220. The Redundant Value voter compares the value of the data variable contained in the received message with the values of that data variable contained in previously received Redundant Data Value messages. If the data value contained in the received Redundant Data Value message agrees with the values in a predetermined number of previously received Redundant Data Value messages, a "voted data value" is obtained. The Redundant Data Value message containing the "voted data value" is forwarded to the Scheduler 206 through the Fault Tolerator 228. When a "voted data value" is obtained, and the value contained in a previously received Redundant Data Value message disagrees with the "voted data value" just obtained, a Record Error message is also transmitted to the Fault Tolerator identifying the Computer which sent the disagreeing data value. If the Redundant Data Value message does not produce a "voted data value", the Redundant Data Value message is discarded. If after a "voted data value" is obtained, the value of the data variable contained in a subsequent Redundant Data Value message disagrees with the "voted data value", a Record Error message is transmitted to the Fault Tolerator 228. Each error-free Task Unselected/Selected message, passed by the Message Format Checker 216, is forwarded to the Message Sequence Checker 222. The Message Sequence Checker checks the message for scheduling sequence errors, and forwards it to the Fault Tolerator 228 if no errors are detected. The Fault Tolerator checks if the Computer which sent the message is currently considered to be faulty. If that Computer is not faulty, the error free Task Unselected/Selected message is forwarded to the Scheduler 206; otherwise, the message is discarded. If the Sequence Checker detects an error, it sends a Record Error message to the Fault Tolerator 228. Each error-free Task Completed/Started message, passed by the Message Format Checker 216, is forwarded to the Execution Time Checker 224. The Execution Time Checker starts a watch-dog timer and forwards the message to the Message Sequence Checker 222. The Message Sequence Checker checks each message and forwards it to the Fault Tolerator 228, if no error is detected. The Fault Tolerator checks if the Computer which sent the message is currently considered to be faulty. If that Computer is not faulty, the Task Completed/Started message is forwarded to the Scheduler 206; otherwise, the message is discarded. If the watch-dog timer for a Computer expires before it is restarted by a subsequent Task Completed/Started message, the Execution Time Checker 224 sends a Record Error message to the Fault Tolerator 228. If the Message Sequence Checker detects an error, it sends a Record Error message to the Fault Tolerator. Each error-free Sampling Number message, passed by the Message Format Checker 216, is forwarded to the Synchronizer 226. The Synchronizer compares the Sampling Number messages. Sampling Number messages are not passed on to the Fault Tolerator 228. However, the Synchronizer periodically generates a new Sampling Number message, sending it to the Transmitter 212. The Synchronizer compares the sampling number contained in each received Sampling Number message with the sampling numbers contained in previously received Sampling Number messages and with the previously determined "voted sampling number". If the sampling number contained in the received Sampling Number message agrees with a predetermined number of sampling numbers contained in previously received Sampling Number messages, a new "voted sampling number" is obtained and an "initiate input/output tasks" message is sent to the Scheduler 206. If the Sampling Number message produces a new "voted sampling number", and if the sampling number given in a previously received Sampling Number message disagrees with the "voted sampling number" just obtained, a Record Error message is sent to the Fault Tolerator 228. Each error-free Error message is forwarded directly to the Fault Tolerator 228 from the Message Format Checker 216. The Fault Tolerator compares this message with previously received Error messages. If the Fault Tolerator decides that a particular Computer is faulty, based upon a predetermined number of Error messages naming that Computer, the Fault Tolerator will thereafter consider that Computer to be faulty. If that Computer was not previously considered to be faulty, the Fault Tolerator sends an internal Exclude Computer message to the Scheduler 206. The Fault Tolerator also activates the lamps in the Fault Status Display Panel 230 associated with the Computer which is now considered to be faulty. The Display Panel indicates those Computers which are presently excluded, as well as any Computer which was at one time excluded but has subsequently been readmitted into the system. When a Record Error message is received by the Fault Tolerator 228, from the Message Format Checker 216, Reasonable Limits Checker 218, Redundant Value Voter 220, Message Sequence Checker 222, Execution Timer Checker 224, or Synchronizer 226, the Fault Tolerator thereafter considers the Computer identified in the Record Error message to be faulty. If a specified time interval has passed since an Error message was sent regarding that Computer, an Error message is sent to the Transmitter 212 for transmission to all Computers. If that Computer was not previously considered to be faulty, the Fault Tolerator sends an Exclude Computer message to the Scheduler 206. The Fault Tolerator also activates the lamps in the Fault Status Display Panel 230 associated with the Computer which is now considered to be faulty. When the Fault Tolerator excludes a Computer, it checks for certain abnormal conditions. If the excluded Computer is the Fault Tolerator's own Computer, it restarts its own Computer. Similarly, if the number of excluded Computers exceeds a predetermined number, it restarts its own Computer. The number of excluded Computers could exceed the predetermined when its own Computer is faulty, or when some common fault produces errors in many Computers. To restart its own Computer, the Fault Tolerator sends a Restart message to the Start Fault Tolerator Module 231 and to the Scheduler 206. The Fault Tolerator also monitors the elapsed time since a Computer was last deemed to be faulty, in response to either an internal Record Error message or matching Error messages received from other Computers. When a faulty (excluded) Computer transmits error-free messages for a predetermined length of time, the Fault Tolerator reverses the excluded status for that Computer and readmits that Computer into active participation in the system. When such a decision is made, the Fault Tolerator sends an Exclude Computer message to the Scheduler 206. The Exclude Computer message shows the readmitted Computer as not (presently) excluded. The Fault Tolerator also deactivates the presently excluded lamp in the Fault Status Display Panel associated with the Computer no longer excluded. However, it leaves on the lamp indicating that the Computer was excluded at one time. When the Computer is starting after being turned on, or restarting after a momentary power failure or interruption, the Synchronizer 228 starts its sampling period timer, and transmits an internal Restart message to the Start Fault Handler Module 231 and the Scheduler 206. The Start Fault Handler Module initilizes internal data for the Fault Tolerator 228, Redundant Value Voter 220, Message Sequence Checker 222, and Execution Time Checker 224. The Synchronizer then generates an internal "initiate fail-safe task" message which is transmitted to the Scheduler 206. The Synchronizer continues to generate the "initiate fail-safe task" message at periodic intervals until a predetermined number of Computers are operating and their sampling period timers and sampling numbers are synchronized. When the sampling period timer expires, the Synchronizer restarts the sampling period timer and generates a Sampling Number message containing its current sampling number. This message is sent via the Transmitter 212 to all of the Computers in the system. Concurrently, the other Computers are generating similar Sampling Number messages, whether they are also starting, or are operating normally. The Synchronizer accepts the Sampling Number messages received from all Computers and attempts to determine the current sampling number of the system. The Sampling number is determined by a voting process, i.e, a sampling number on which at least a predetermined number of Computers agree. Once this "voted sampling number" is determined, the Synchronizer uses the "voted sampling number" as its own sampling number and synchronizes its sampling period timer with all the other sampling period timers in the system. When the "voted sampling number" is first obtained and the sampling period timer is synchronized, the Synchronizer sends an internal "initiate start-up task" message to the Scheduler 206. The "initiate start-up task" message causes the Scheduler 206 to initiate scheduling of special start-up task(s) assigned to the Computer. The Synchronizer also generates an internal "initiate input/output tasks" message when a "voted sampling number" is obtained, which is sent to the Scheduler 206. As previously indicated, the "initiate input/output tasks" message initiates scheduling of the input/output tasks which sample the system inputs and outputs. Sampling is done by the input/output tasks using the Input/Output Network 108 of the Applications Computer, to receive input data from the Sensors and Manual Controls 14 and to output data to the Actuators and Displays as shown on FIG. 3. The execution number used for the initiated input/output tasks is the current sampling number of the Synchronizer. The Computer thereafter receives messages from the other Computers, and new input data from the sensors and manual controls, and assumes normal active participation in the Fault Tolerant Multi-Computer System. The preferred implementation of the Fault Handler is one, or possibly several, microprocessors having adequate storage and computational capabilities, such as the 8080A Microprocessor manufactured by the Intel Corporation of Santa Clara, Calif. or any other microcomputer of similar type. However, if desired, the Fault Handler may be made from commercially available discrete electronic components, as shall be shown by way of example in the following description of the individual modules of the Fault Handler. The individual modules of the Fault Handler will be described in the following sections by means of Psuedo Code computer program listings. Psuedo Code is used for the program listings because it is not dedicated to a particular microprocessor or type of microprocessor, and is universally applicable to different types of computers and computer languages. A programmer having ordinary skills in the art would be able to translate the presented Psuedo Code program listings into actual program listings for a particular computer. Message Format Checker The Psuedo Code program for the Message Format Checker 216 is given in Table III-A and a comparable flow diagram is shown on FIG. 6. The Message Format Checker module checks all messages received from all Computers 10, via the Receivers 202. The portions of the received message that are checked by the Message Format Checker are the first byte of the message which identifies the message type, the second byte which identifies the Computer sending the message, and the special bits generated by the Receiver which identify the Computer connected to that Receiver and any errors detected by the Receiver. As previously discussed, each Receiver 202 receives messages from a particular Computer and the Operations Controller has a plurality of Receivers 202, each receiving only the messages sent by a specified Computer in the system. In the given example, it is assumed that a special byte generated by the Receiver 202 is identical to the expected second byte of the message, which identifies the Computer which sent the message.
TABLE III-A
______________________________________
MESSAGE FORMAT CHECKER
______________________________________
/* IF ERROR DETECTED BY RECEIVER */
IF ERROR DETECTED BITS NOT = 0
THEN
ERROR INDICATOR =
FUNCTION OF (ERROR DETECTED BITS)
ELSE /*IF MESSAGE TYPE CODE NOT VALID*/
IF MESSAGE TYPE > MAXIMUM TYPE
ORIF MESSAGE TYPE = 0
THEN
ERROR INDICATOR = MESSAGE TYPE ERROR
ELSE /*CHECK SENDING COMPUTER CODE*/
IF SENDING COMPUTER NOT = RECEIVER
THEN
ERROR INDICATOR =
SENDING COMPUTER CODE ERROR
ELSE
ERROR INDICATOR = 0
ENDIF
ENDIF
ENDIF
IF ERROR INDICATOR NOT = 0 /* IF ERROR WAS
DETECTED*/
THEN
CALL: SEND MESSAGE TO FAULT TOLERATOR
INPUT DATA:
MESSAGE TYPE = RECORD ERROR TYPE
NEW FAULTY COMPUTER = RECEIVER
ERROR INDICATOR = ERROR INDICATOR
OUTPUT DATA: NONE
ELSE /*FORWARD RECEIVED MESSAGE*/
/*CASE OF MESSAGE TYPE*/
IF MESSAGE TYPE = TASK DATA VALUE TYPE
THEN
CALL: SEND MESSAGE TO
REASONABLE LIMITS CHECKER
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ELSE IF MESSAGE TYPE = REDUNDANT DATA
VALUE TYPE
THEN
CALL: SEND MESSAGE TO REDUNDANT VALUE
VOTER
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ELSE IF MESSAGE TYPE =
TASK COMPLETED/STARTED TYPE
THEN
CALL: SEND MESSAGE TO EXECUTION TIME
CHECKER
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ELSE IF MESSAGE TYPE =
TASK UNSELECTED/SELECTED TYPE
THEN
CALL: SEND MESSAGE TO
MESSAGE SEQUENCE CHECKER
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ELSE IF MESSAGE TYPE = SAMPLING NUMBER TYPE
THEN
CALL: SEND MESSAGE TO SYNCHRONIZER
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ELSE /*MESSAGE TYPE = ERROR MESSAGE TYPE*/
CALL: SEND MESSAGE TO FAULT TOLERATOR
INPUT DATA: MESSAGE = RECEIVED MESSAGE
OUTPUT DATA: NONE
ENDIF ENDIF ENDIF ENDIF ENDIF
/*END CASE*/
ENDIF
RETURN
END:
______________________________________
Referring to the Psuedo Code program in Table III-A and flow diagram of FIG. 6, the Message Format Checker 216 first checks if an error was detected by the Receiver, as shown in the flow diagram by block 232. The symbols "/*" and "*/" are used in the first line of Table III-A and thereafter to indicate that the enclosed text is a comment in the Psuedo Code and not part of the actual code. The enclosed text is only a comment explaining the following line. For example, the enclosed text on line one of Table III-A identifies the "ERROR DETECTED BITS" of line two as the error detected signals generated by the Receiver. If the error detected bits obtained from the Receiver are not equal to zero (0), where zero values of the error detected bits are indicative of no error detected by the Receiver, then a Record Error message is generated as indicated by block 234, identifying that an error was detected by the Receiver and the checking is terminated (third ENDIF). The error indicator code designating the type of error detected is generated as a function of the error detected bits obtained from the receiver. If no error was detected by the Receiver, the Message Format Checker proceeds (ELSE) to check the message type code as indicated by block 236. If the message type code is a number greater than the constant maximum inter-computer message type number used in the system, or if it is equal to zero as checked by block 237, then a Record Error message is generated as indicated by block 238, and the checking is terminated (second ENDIF). The error indicator code is set equal to the fixed value which identifies the error as a message type error. If the message type code is not equal to zero (0) and is not greater than the maximum type number, the program proceeds (ELSE) to compare the sending Computer byte of the message with the Computer code generated by the Receiver, as indicated by block 240. If the sending Computer code contained in the message does not agree with the Computer code generated by the Receiver, a Record Error message is generated as indicated by block 242 and the checking is terminated (first ENDIF). The error indicator is set equal to the fixed value which identifies the error as a sending Computer code error. If no error in the sending Computer code is found, the error indicator is set to zero (0) as indicated by block 244, and the checking is ended. The error indicator value of zero indicates that no error was detected. In the Psuedo Code program Table III-A and flow diagram FIG. 6, a Record Error message is "generated" when an error is detected by making the error indicator non-zero. Following the checking (the third ENDIF), the error indicator is tested to determine if a Record Error message must be sent, as indicated by block 233. If the error indicator is not zero, (THEN) a Record Error message is sent to the Fault Tolerator, as indicated by block 235. If the error indicator is zero (ELSE), the received message must be forwarded to the proper checker module. The message type code is then tested to determine the message type. If the message type is a Task Data Value message as tested by block 259, the received message is sent to the Reasonable Limits Checker 218, as indicated by block 239. If the message type is a Redundant Data Value message as tested by block 241, the received message is sent to the Redundant Value Voter 220, as indicated by block 243. If the message type is a Task Completed/Started message as tested by block 245, the received message is sent to the Execution Time Checker 224, as indicated by block 247. If the message type is a Task Unselected/Selected message as tested by block 249, the received message is sent to the Message Sequence Checker 222, as indicated by block 251. If the message type is a Sampling Number message as tested by block 253, the received message is sent to the Synchronizer 226, as indicated by block 255. If the message type is not any of the other types, it must be an Error message, and the received message is sent to the Fault Tolerator 228, as indicated by block 257. As is evident from the above description of the Message Format Checker, the Psuedo Code program of Table III-A is a short hand text description of the flow diagram shown in FIG. 6. This short hand description is comparable to the high level programming languages presently being used in computer systems. A hardware circuit implementation of the Message Format Checker is illustrated on FIG. 7. The Message Format Checker has five registers, the Error Detected Bits Register 246, the Message Type Register 248, the Sending Computer Register 250, the Receiver Register 252 and the Maximum Type Register 266. These registers may be individual elements as shown, or may be portions of larger storage elements such as a random access (RAM) memory as is known in the art. The outputs of the Error Detected Bits Register 246 are connected to the inputs of a multiple input OR Gate 254 and to Receiver Error Code Generator 260. The output of OR Gate 254 is connected to the SET input of Flip Flop 256 through AND Gate 261 AND Gate 261 receives a timing signal RLC1 at its other input. Flip Flop 256 has its Q output connected to one input of OR Gate 280 and one input of AND Gate 258. The Q output of Flip Flop 256 is connected to inputs of AND Gates 270 and 288. The RESET input of Flip Flop 256 receives a RESET signal. A Read Error signal is received at the other input of AND Gate 258. The output of AND Gate 258 is connected to the enable input of a Receiver Error Code Generator 260, which generates one of a set of predetermined coded signals when enabled. The particular code is selected by the error detected bits input from the Error Detected Bits Register 246. The Message Type Register 248 receives the message type byte from the Receiver. The multiple outputs of the Register 248 are connected in parallel to the inputs of the Comparator 262, to the inputs of a multiple input NOR Gate 264, and to the parallel inputs of Decoder 314. The outputs of Decoder 314 are connected to the various checker modules such as the Message Sequence Checker 222, Execution Time Checker 224, Reasonable Limits Checker 218, Redundant Value Voter 220, Fault Tolerator 228, and Synchronizer 226. The Maximum Type Register 266 stores a fixed number indicative of the maximum message type code. The multiple outputs of Register 266 are connected in parallel to Comparator 262. The Comparator 262 is of a known type which generates an output signal when the numerical value of the message type code stored in Register 248 is greater than the maximum type code stored in Register 266. The output of Comparator 262 and the output of NOR Gate 264 are connected to different inputs of an OR Gate 268. The output of OR Gate 268 is connected to an AND Gate 270, the output of which is connected to the SET input of Flip Flop 272. AND Gate 270 receives a timing signal RLC-2 at its other input. The Q output of Flip Flop 272 is connected to one input of an AND Gate 274 and of OR Gate 280. AND Gate 274 also receives the Read Error signal at its other input, and its output is connected to a Message Type Error Code Generator 276. The Message Type Error Code Generator 276 is similar to the Receiver Error Code Generator 260. The output of OR Gate 280 is connected to an input of OR Gate 296. The RESET input of Flip Flop 272 receives the RESET signal, and the Q output of Flip Flop 272 is connected to an input of AND Gate 288. The Sending Computer Register 250 receives the sending computer byte contained in the received message. The parallel outputs of the Sending Computer Register 250 are connected in parallel to the parallel inputs to Comparator 284. The Receiver Register 252 receives the receiver code generated by the Receiver, indicative of the Receiver which received the message. The parallel outputs of the Receiver Register 252 are connected to a Gate 286, and to Comparator 284. The output of Comparator 284, indicative that the computer codes stored in the Sending Computer Register 250 and the Receiver Register 252 are alike, is connected to an inverted input of AND Gate 288. AND Gate 288 also receives timing signal RLC-3. The output of AND Gate 288 is connected to the SET input of Flip Flop 290. The Q output of Flip Flop 290 is connected to one input of an AND Gate 292 and to an input to OR Gate 296. The other input to AND Gate 292 receives the Read Error signal. The output of AND Gate 292 is connected to a Computer Error Code Generator 294, which is comparable to the Message Type Error Code Generator 276 and Receiver Error Code Generator 260. The Receiver Error Code Generator 260, Message Type Error Code Generator 276 and Computer Error Code Generator may be separate elements as shown, or may be codes stored in a common read only (ROM) memory addressed by the outputs of the respective AND Gates 258, 274 and 292 and the Error Detected Bits Register 246. This read only memory may also store the maximum type number shown as being stored in Register 266. The output of OR Gate 296 is connected to the Enable input of Gate 286 and to the SET input of Flip Flop 300. The RESET signal is also received at the RESET inputs of Flip Flops 290, and 300. The operation of the Message Format Checker is as follows: Flip Flops 256, 272, 290, and 300 are first placed in a reset state by the RESET signal, while the Error Detected Bits generated by the Receiver 202, the message type byte of the received message, the sending computer byte of the message, and the receiver byte generated by the Receiver are stored in Registers 246, 248, 250, and 252, respectively. The parallel outputs of the Error Detected Bits Register 246 are or'ed in OR Gate 254, whose output is a logical zero when no errors were detected by the Receiver, and is a logical one when the Receiver detected an error. A logical one output of OR Gate 254 is received by AND Gate 261 which sets Flip Flop 256 in response to timing signal RLC-1, causing its Q output to assume a logical one state, and its Q output to go to a logical zero. The timing signals RLC-1, RLC-2 RLC-3 are sequentially generated as indicated on FIG. 10. The logical one at the Q output of Flip Flop 256 enables AND Gate 258, which permits the Receiver Error Code Generator 260 to be enabled by a Read Error signal received at the other input of AND Gate 258. The logical one at the Q output of Flip Flop 256 is also transmitted to the set input of Flip Flop 300 through OR Gates 280 and 296. The logical one signal applied to the set input of Flip Flop 300 causes Flip Flop 300 to switch to the set state, indicating that an error has been detected by the Message Format Checker. In the SET state, the Q output of Flip Flop 256 is a logical zero which disables AND Gates 270 and 288, effectively terminating continued checking by the Message Format Checker. If all of the error detected bits from the Receiver are logical zeros, the Flip Flop 256 remains in the RESET state, with its Q output a logical zero and its Q output a logical one. The logical zero Q output of Flip Flop 256 disables AND Gate 258, preventing the generation of a receiver error code by the Receiver Error Code Generator 260. The logical one Q output of Flip Flop 256 enables AND Gates 270 and 288. The Message Type Register 248 and the Maximum Type Register 266 output their stored code numbers to the Comparator 262. The Comparator 262 compares the message type with the maximum type and generates a logical one signal if the message type is a number greater than the maximum type. A logical one output of Comparator 262 is applied to one input of AND Gate 270 through OR Gate 268. If AND Gate 270 is enabled by a logical one Q output of Flip Flop 256, the timing signal RLC-2 produces a logical one signal transmitted to the SET input of Flip Flop 272. This causes Flip Flop 272 to assume the SET state in which the Q output is a logical one and the Q output is a logical zero. The logical one Q output of Flip Flop 272 is applied to one input of AND Gate 274 and to the SET input of Flip Flop 300 through OR Gates 280 and 296. A Read Error signal applied to the other input of AND Gate 274 energizes the Message Type Error Code Generator 276 to generate a message type error code for a Record Error message transmitted to the Fault Tolerator. NOR Gate 264 monitors the outputs of the Message Type Code Register and generates a logical one signal at its output when the message type code is zero. The output of NOR Gate 264 is applied to one input of AND Gate 270 through OR Gate 268. Again, if AND Gate 270 is enabled by a logical one signal generated at the Q output of Flip Flop 256, Flip Flop 272 will be placed in the SET state by timing signal RLC-2. The Message Type Error Code Generator 276 will be enabled by a subsequent Read Error signal applied to the other input of AND Gate 274. The Q output of Flip Flop 272 is applied to an input of AND Gate 288, which is enabled when Flip Flop 272 is in the RESET state and disabled when Flip Flop 272 is in the SET state. If the message type code stored in Register 248 is less than the maximum type stored in Register 266, and is not zero, the signal applied to the input of AND Gate 270 through OR Gate 268 is a logical zero and Flip Flop 272 remains in its RESET state. With Flip Flop 272 in its RESET state, its Q output is a logical zero and the Message Type Error Code Generator is not energized in response to a Read Error signal applied to the other input of AND Gate 274. The sending computer code and the receiver code are compared in Comparator 284, which generates a logical one output when the two computer codes are identical, and a logical zero output when the two computer codes are different. The output of Comparator 284 is applied to an inverting input of AND Gate 288, and enables AND Gate 288 when the output of Comparator 284 is a logical zero and disables AND GATE 288 when the output of Comparator 284 is a logical one. If AND Gate 288 is enabled by Flip Flop's 256 and 272 being in their RESET state, a logical zero output of Comparator 284 and the timing signal RLC-3 will cause AND Gate 288 to generate a logical one signal placing Flip Flop 290 in its SET state. In the SET state, Flip Flop 290 generates a logical one signal at its Q output which is applied to one input of AND Gate 292 and to the SET input of Flip Flop 300 through OR Gate 296. With AND Gate 292 enabled by the logical one signal at the Q output of Flip Flop 290, the Read Error signal, applied to the other input of AND Gate 292, will enable the Computer Error Code Generator 294 to generate a computer error code for a Record Error message which is communicated to the Fault Tolerator. If the output of Comparator 284 is a logical one, AND Gate 288 is disabled and Flip Flop 290 remains in its RESET state, disabling AND Gate 292. With AND Gate 292 disabled, a Read Error signal applied to its other input is incapable of energizing the Computer Error Code Generator 294 and no error code is generated. The logical one signal applied to the SET input of Flip Flop 300, when either Flip Flop 256, 272, or 290 is placed in its SET state in response to the detection of an error, is also applied to the ENABLE input of Gate 286 which causes the Receiver code to be transmitted to the Fault Tolerator. This corresponds to sending a Record Error message to the Fault Tolerator. If Flip Flop 300 is not placed in the SET state, the Q output is a ONE enabling the message checker modules. The Message Type byte stored in Register 248 is input to Decoder 314. The Decoder 314 decodes the message type and generates an enabling signal on one of six output lines. Each of the six output lines is connected to one of the six modules which will check or use the message, namely the Reasonable Limits Checker 218, the Redundant Value Voter 220, the Message Sequence Checker 222, the Execution Time Checker 224, the Fault Tolerator 228, and the Synchronizer 226. This corresponds to sending the received message on to one of these modules, depending upon the message type. The states of Flip Flops 256, 272, and 290, respectively, are equivalent to the results of the first three "IF" decisions of the Psuedo Code program, and indicate whether or not an error was detected by the Receiver or the Message Format Checker. The sequential operation of these "IF" decisions are controlled by the timing signals RLC-1, RLC-2 and RLC-3 applied to AND Gates 261, 270, and 288. The operation of the circuit, shown on FIG. 7, is functionally equivalent to the Psuedo Code program in Table III-A and the flow diagram shown on FIG. 6. Reasonable Limits Checker The Psuedo Code program for the Reasonable Limits Checker 218 is given on Table III-B, the corresponding flow diagram is shown in FIG. 8, and a comparable hardware implementation is shown on FIG. 9. The Reasonable Limits Checker module checks each Task Data Value message received from the Message Format Checker. Referring to the Psuedo Code program for the Reasonable Limits Checker and the flow diagram shown in FIG. 8, the operation of the Reasonable Limits Checker is as follows:
TABLE III-B
______________________________________
REASONABLE LIMITS CHECKER
______________________________________
/*IF DATA ID NOT VALID*/
IF DATA ID > MAXIMUM DATA ID
THEN
ERROR INDICATOR = DATA ID ERROR
ELSE /*IF DATA VALUE NOT WITHIN LIMITS*/
IF DATA VALUE > MAXIMUM DATA VALUE
(DATA ID)
ORIF DATA VALUE < MINIMUM DATA VALUE
(DATA ID)
THEN
ERROR INDICATOR = LIMIT ERROR
ELSE
ERROR INDICATOR = 0
ENDIF
ENDIF
IF ERROR INDICATOR NOT = 0 /*IF ERROR WAS
DETECTED*/
THEN
CALL: SEND MESSAGE TO FAULT TOLERATOR
INPUT DATA:
MESSAGE TYPE = RECORD ERROR TYPE
NEW FAULTY COMPUTER = COMPUTER
ERROR INDICATOR = ERROR INDICATOR
OUTPUT DATA: NONE
ELSE
CALL: SEND MESSAGE TO FAULT TOLERATOR
INPUT DATA:
MESSAGE = TASK DATA VALUE MESSAGE
OUTPUT DATA: NONE
ENDIF
RETURN
END
______________________________________
The procedure begins by checking the data variable identification number (DATA I.D.), contained in the received Task Data Value message, to determine if the identification number is valid, as indicated by block 302. If the Data ID is greater than a constant Maximum Data ID (if the Data ID is not valid), then a Record Error message is generated as indicated by block 304, and the checking is terminated. The error indicator is set equal to the fixed value which identifies the error as a Data ID error. If the Data ID is less than the predetermined Maximum Data ID, the procedure checks the data value contained in the received message, as indicated by block 306. If the data value is greater than the predetermined maximum value for that data variable, then a Record Error message is generated indicating a data value limit error, as indicated by block 308. If the data value is less than the predetermined maximum value, the procedure checks if the data value is less than a predetermined minimum value for that data variable, as indicated by block 310. If the data value is less than the minimum value, a Record Error message is generated indicating a data value limit error, as indicated by block 308. If, however, the data value is greater than the predetermined minimum value, the error indicator is set to zero (0) indicating the message is correct, as indicated by block 311. As in the Message Format Checker, the Reasonable Limits Checker generates a Record Error message by making the error indicator non-zero. Following the checking, the error indicator is tested to determine if a Record Error message must be sent, as indicated in block 303. If the error indicator is non-zero, a Record Error message is sent to the Fault Tolerator, as indicated in Block 307. If the error indicator is zero, the received Task Data Value message is sent to the Fault Tolerator 228, as indicated in Block 305. A hardware implementation of the Reasonable Limits Checker 218 is shown in FIG. 9. Referring to FIG. 9, the byte of the message specifying the data variable (Data I.D.) is stored in Register 322, and the 8 bytes indicative of the data value are stored in Register 338. The output of Decoder 314 shown in FIG. 7 indicative that the message is of Task Data Value type, and therefore is to be checked by the Reasonable Limits Checker, is connected to inputs of AND Gates 316, 318, and 320. AND Gates 316, 318 and 320 are also enabled by a logical one signal at the Q output of Flip Flop 300 shown in FIG. 7. AND Gates 316, 318, and 320 also receive, at their other inputs, sequential timing signals RLC-1, RLC-2, and RLC-3, shown on FIG. 10. The output of AND Gate 316 is applied to one input to AND Gate 317. The output of AND Gate 318 is connected to an input of AND Gate 344. The output of AND Gate 320 is connected to an input of AND Gate 354. The outputs of the Data ID Register 322 are connected in parallel to Comparator 324, and to the address inputs of the Maximum Value Read Only Memory 326 and the Minimum Value Read Only Memory 328. The parallel outputs of the Maximum Data ID Register 330 are also connected to the parallel inputs of Comparator 324. The output of Comparator 324, indicating if the Data ID stored in Register 322 is larger than the Maximum Data ID stored in Register 330, is connected to the other input to AND Gate 317, which has its output connected to the SET input of Flip Flop 332. The Q output of Flip Flop 322 is connected to an input of OR Gate 333 and to an input of AND Gate 334. The Q output of Flip Flop 322 is connected to inputs to AND Gates 344 and 354. AND Gate 334 receives the Read Error signal at its other input, and its output is connected to the enable input of a Data ID Error Code Generator 336. The Data ID Error Code Generator 336 may be a separate element of a known type, which outputs a predetermined code when enabled, or may be a discrete storage location of a read only (ROM) memory storing the predetermined code, which is addressed by the output of AND Gate 334. The parallel outputs of the Maximum Value Read Only Memory 326 are connected to the parallel inputs of Comparator 340. The parallel outputs of the Minimum Value Read Only Memory 328 are connected to the parallel inputs of Comparator 342. The parallel outputs of the Data Value Register 338 are connected to the other parallel inputs of Comparator 340 and Comparator 342. The output of Comparator 340, indicative of the data value in Register 338 being greater than the maximum data value stored in the Read Only Memory 326, is connected to AND Gate 344. The output of Comparator 342, indicative of the data value in Register 338 being less than the minimum data value stored in Read Only Memory 328, is connected to AND Gate 354. Other inputs of AND Gates 344 and 354 are connected to the Q output of Flip Flop 332. AND Gate 354 also has an input connected to the Q output of Flip Flop 346. The output of AND Gate 344 is connected to the SET input of Flip Flop 346, which has its Q output connected to OR Gate 348. The output of AND Gate 354 is connected to the SET input of Flip Flop 356, which also has its Q output connected to an input of OR Gate 348. The output of OR Gate 348 is connected to an input of AND Gate 358 and an input of OR Gate 333. The other input to AND Gate 358 receives the Read Error signal. The output of AND Gate 358 is connected to the enable input of a Limit Error Code Generator 352. The Limit Error Code Generator 352 may be of a known type, which generates a predetermined code transmitted to the Fault Tolerator when enabled by the output signal from AND Gate 358 as shown, or alternately may be a storage location in a read only memory. The output of OR Gate 333 is connected to the SET input of Flip Flop 359, which receives a RESET signal at its RESET input. The operation of the Reasonable Limits Checker 218 is discussed with reference to the circuit shown on FIG. 9 and the waveforms shown on FIG. 10. When the Q output of Flip Flop 300, shown on FIG. 7, is a logical one signal indicative that no error was found in the Message Format Checker, then AND Gates 316, 318 and 320 receive an enabling signal at one of their inputs. The output from the Decoder 314 indicating that the message is of Task Data Value type, and thus is to be checked by the Reasonable Limits Checker, also enables AND Gates 316, 318, and 320. The RESET signal applied to the RESET inputs of Flip Flop 332, 346, 356, and 359 places them in their RESET state. A subsequent RLC-1 signal applied to AND Gate 316 causes AND Gate 316 to generate an output signal enabling AND Gate 317. If the Data I.D. code stored in Register 322 is a number greater than the maximum data ID number stored in Register 330, the Comparator 324 outputs a logical one signal transmitted to the SET output of Flip Flop 332 through enabled AND Gate 317. Flip Flop 332 is placed in the SET state and generates a signal at its Q output enabling AND Gate 334 and placing Flip Flop 359 in its SET state via OR Gate 333. Flip Flop 332 remains in the SET state. The subsequently generated Read Error signal applied to the other input of AND Gate 334 enables the Data I.D. Error Code Generator 336 to generate a Data I.D. error code for a Record Error message which is transmitted to the Fault Tolerator. When Flip Flop 332 is placed in the SET state, by the detection of a Data I.D. code error, its Q output assumes a logical zero state which disables AND Gates 344 and 354. If no Data ID error is detected, Flip Flop 332 remains in the RESET state and its Q output is a logical one signal which enables AND Gates 344 and 354. The subsequent RLC-2 signal, received by AND Gate 318, enables AND Gate 344. The Maximum Value Read Only Memory location, which is addressed by the Data I.D. stored in Register 322, outputs a predetermined maximum data value for that particular Data ID, which is compared in Comparator 340 with the data value contained in Register 338. If the data value stored in Register 338 is greater than the maximum data value output from the Read Only Memory 326, the Comparator 340 outputs a signal enabling AND Gate 344. The output of AND Gate 344 places Flip Flop 346 in the SET state. In the SET state, Flip Flop 346 generates a signal at its Q output which enables AND Gate 358 through OR Gate 348, and which places Flip Flop 359 in the SET state via OR Gates 348 and 333, signifying the detection of an error. A Read Error signal, subsequently received at the other input of AND Gate 358, enables the Limits Error Code Generator 352 to generate a data value limit error code for a Record Error message transmitted to the Fault Tolerator. In a like manner, the Minimum Value Read Only Memory 328 is addressed by the Data ID code stored in Register 322. Comparator 342 then compares the data value stored in register 338 with the minimum data value output from the Read Only Memory 328, and generates an output signal transmitted to an input of AND Gate 354 when the data value is less than the minimum data value output by the Read Only Memory 328. The other inputs of AND Gate 354 are enabled by the Q outputs of Flip Flops 332 and 346 when they are in their RESET state, and by the output of AND Gate 320 when enabled in response to the timing signal RLC-3. The output of AND Gate 354 places Flip Flop 356 in its SET state. The signal generated at the Q output of Flip Flop 356 is transmitted to AND Gate 358 through OR Gate 348, and to Flip Flop 359 through OR Gates 348 and 333. If either Flip Flop 346 or 356 is in its SET state, Flip Flop 359 will be placed in its SET state, signifying the detection of an error, and AND Gate 358 will generate an output signal enabling the Limit Error Code Generator 352 in response to a Read Error signal received at its other input. The RESET, RLC-1, RLC-2, RLC-3 and Read Error signals are sequentially generated as indicated on FIG. 10. As evident from the above description, the circuit shown on FIG. 9 is functionally equivalent to the Psuedo Code given in Table III-B and the flow diagram shown in FIG. 8. Redundant Value Voter The function of the Redundant Value Voter 220 is to find a "voted data value" from among the data values received in Redundant Data Value messages, which is the correct or most probable data value. This is accomplished by a voting process which identifies the "voted data value" when a predetermined number of the received redundant data values agree. The Redundant Value Voter also identifies those Computers which sent redundant data values that do not agree with the "voted data value", and generates a Record Error message identifying each such faulty Computer. The Psuedo Code program listing for the Redundant Value Voter module is given on Table III-D and the corresponding flow diagram is illustrated on FIG. 11. The subroutines used in the Redundant Value Voter are given on Tables III-E, III-F, and III-G, while the corresponding subroutine flow diagrams are illustrated on FIGS. 12, 13, and 14. A corresponding hardware implementation for the Redundant Value Voter is deemed to be superfluous in view of the direct correlation between the Psuedo Code program listing and circuit diagram shown with respect to the Message Format Checker and Reasonable Limits Checker previously described. A circuit implementation therefore is not shown. It is submitted that a circuit designer of ordinary skill in the art would be capable of designing a circuit performing the functions described in the Psuedo Code program, without undue experimentation or effort. Hereinafter, only the Psuedo Code program listings for the individual modules of the system will be given. The elimination of the corr | ||||||
