| 5926646 |
Context-dependent memory-mapped registers for transparent expansion of a register file |
| Jul-20-1999 |
A microprocessor includes an expanded set of registers in addition to the architected set of registers specified by the microprocessor architecture employed by the microprocessor. The expanded set of registers... |
| 5918050 |
Apparatus accessed at a physical I/O address for address and data translation and for context switching of I/O devices in response to commands from application programs |
| Jun-29-1999 |
A computer system including a central processing unit, a system input/output bus, an input/output device, and an input/output control unit accessed at a physical input/output address for translating addresses... |
| 5913059 |
Multi-processor system for inheriting contents of register from parent thread to child thread |
| Jun-15-1999 |
Each of a plurality of processors in a multi-processor system executes a thread. The processor includes an execution unit, a reorder buffer which temporally keeps the execution results by the execution... |
| 5907702 |
Method and apparatus for decreasing thread switch latency in a multithread processor |
| May-25-1999 |
The method and apparatus for decreasing thread switch latency in a multithread processor stores instructions for an active thread in a primary instruction queue, and stores instructions for a dormant thread... |
| 5896141 |
System and method for virtual device access in a computer system |
| Apr-20-1999 |
A system and method for virtual device access in a graphics computer is disclosed. The present invention enables applications running on a graphics computer to access the graphics hardware device with... |
| 5887167 |
Synchronization mechanism for providing multiple readers and writers access to performance information of an extensible computer system |
| Mar-23-1999 |
A synchronization arrangement provides writer and reader entities access to an information resource, such as a trace buffer, located in a registry of a computer. The arrangement comprises a counter upon... |
| 5872963 |
Resumption of preempted non-privileged threads with no kernel intervention |
| Feb-16-1999 |
A system and method for context switching between a first and a second execution entity (such as a thread) without having to enter into protected kernel mode. The system includes a memory and a plurality... |
| 5857096 |
Microarchitecture for implementing an instruction to clear the tags of a stack reference register file |
| Jan-5-1999 |
An apparatus (e.g. a microarchitecture of a microprocessor) comprising a plurality of tags associated with a first storage area indicating that locations in the first storage area are either empty or non-empty... |
| 5845325 |
Virtual address write back cache with address reassignment and cache block flush |
| Dec-1-1998 |
Hardware and software improvements in workstations which utilize virtual addressing in multi-user operating systems with write back caches, including operating systems which allow each user to have multiple... |
| 5825769 |
System and method therefor of viewing in real time call traffic of a telecommunications network |
| Oct-20-1998 |
In a telecommunications network, to provide both statistical reporting functions and reporting on a call by call detail basis, a "TRAFFICVIEW" Server (TVS) system is incorporated with a MCI Traffic Statistics... |
| 5825770 |
Multiple algorithm processing on a plurality of digital signal streams via context switching |
| Oct-20-1998 |
A technique of processing multiple digital signal streams uses one instantiation of an algorithm with memory storage of the next state, to facilitate context switching. In one embodiment, the invention... |
| 5815701 |
Computer method and apparatus which maintains context switching speed with a large number of registers and which improves interrupt processing time |
| Sep-29-1998 |
Registers are divided into a global pool and a local pool. Code to be used in the processor must allocate registers from the global pool for values that live across decision trees and from the local pool... |
| 5812846 |
Method and apparatus for passing control from a first process to a second process |
| Sep-22-1998 |
An apparatus and method for implementation in a computing system (5) which allows the transfer of control from one process (10) to another process (40). The input/output supervisor (20) and a newly provided... |
| 5809522 |
Microprocessor system with process identification tag entries to reduce cache flushing after a context switch |
| Sep-15-1998 |
An x86 microprocessor system with a process identification system which stores a number assigned to each process run by the microprocessor system and associates this number with instructions, data, and... |
| 5802371 |
Method of walking-up a call stack for a client/server program that uses remote procedure call |
| Sep-1-1998 |
When displaying the caller stack of a distributed client/server program that uses Remote Procedure Calls (RPC), the user is provided the capability of viewing the RPC calls in the same manner as normal... |
| 5799188 |
System and method for managing variable weight thread contexts in a multithreaded computer system |
| Aug-25-1998 |
A system and method for managing variable weight contexts in a multithreaded operating system. Each thread is allocated a standard thread state. In addition, each thread has an indicator of whether or... |
| 5799143 |
Multiple context software analysis |
| Aug-25-1998 |
A method for multiple context analysis of software applications in a multiprocessing (22, 23), multithreaded computer environment utilizes instrumentation code inserted (54, 55) into the applications.... |
| 5796397 |
Information processing device with input data sharing among several applications |
| Aug-18-1998 |
An information processing device is described which is capable of easily changing a current application to new one during inputting data for said application through a composite input screen and of effectively... |
| 5794047 |
Method of walking-up a call stack for a client/server program that uses remote procedure call |
| Aug-11-1998 |
When displaying the caller stack of a distributed client/server program that uses Remote Procedure Calls (RPC), the user is provided the capability of viewing the RPC calls in the same manner as normal... |
| 5794037 |
Direct access to slave processing by unprotected application using context saving and restoration |
| Aug-11-1998 |
A computer system provides multiple unprotected applications direct access to a slave processor. The host processor issues context switching requests to save and restore partially completed unprotected... |
| 5771382 |
System and method for synchronizing static variable initialization and reference under a multi-threaded computer environment |
| Jun-23-1998 |
The present invention is a system and method to avoid static variable initialization and reference conflicts in a multi-threaded computer system. There are four major problems that arise with computer... |
| 5764861 |
Apparatus and method for controlling context of input/output devices in a computer system |
| Jun-9-1998 |
Hardware input/output control apparatus for use in a computer system which control apparatus is joined to a plurality of input/output devices, and includes circuitry which responds to commands from unprivileged... |
| 5758161 |
Testing method for checking the completion of asynchronous distributed collective operations |
| May-26-1998 |
A method for testing the completion of a command issued earlier in a multiprocessing system having a plurality of nodes. During an initialization phase, each command has been identified by a handle and... |
| 5754818 |
Architecture and method for sharing TLB entries through process IDS |
| May-19-1998 |
An address translation control circuit which operates in connection with a processor and a translation look-aside buffer ("TLB") to perform virtual-to-physical address translations through shared entries... |
| 5742822 |
Multithreaded processor which dynamically discriminates a parallel execution and a sequential execution of threads |
| Apr-21-1998 |
A multithreaded processor includes an instruction pipelined unit 140 and a register file 120 composed of a plurality of register banks 130. The register file 120 is coupled to an external memory 190 through... |
| 5727211 |
System and method for fast context switching between tasks |
| Mar-10-1998 |
A system and method for fast context switching between tasks by tracking task utilization of shared system resources and optimizing swapping the shared system resources to backing store by computing the... |
| 5724586 |
Method for improving cache locality of a computer program |
| Mar-3-1998 |
A method for improving the cache locality of an application executing in a computer system by decomposing the application into one or more threads and subsequently scheduling the execution of the threads... |
| 5708808 |
Method and apparatus for concurrency with critical regions |
| Jan-13-1998 |
Allows concurrency for user program and device operations for user program's device request (10), by returning immediately to user program (16) when device becomes busy (12), switching back to device driver... |
| 5701508 |
Executing different instructions that cause different data type operations to be performed on single logical register file |
| Dec-23-1997 |
A method for executing different sets of instructions that cause a processor to perform different data type operations in a manner that is invisible to various operating system techniques, that promotes... |
| 5682531 |
Central processing unit |
| Oct-28-1997 |
An instruction code includes a first memory address part 22 and a second memory address part 23, and when a microinstruction decoder 14 decodes an operation code of save or restore instruction of the instruction... |
| 5666523 |
Method and system for distributing asynchronous input from a system input queue to reduce context switches |
| Sep-9-1997 |
A method and system for reducing context switches when distributing input to applications are provided. When input is received, it is stored in a system input queue. A system thread distributes the input... |
| 5659750 |
Apparatus for context switching of input/output devices in responses to commands from unprivileged application programs |
| Aug-19-1997 |
Hardware input/output control apparatus for use in a computer system which control apparatus is joined to a plurality of input/output devices, and includes circuitry which responds to commands from unprivileged... |
| 5659749 |
System and method for performing efficient hardware context switching in an instrumentation system |
| Aug-19-1997 |
A system and method for performing more efficient hardware context switches in a computer-controlled instrumentation system including a computer system which controls a plurality of instruments. The instrumentation... |
| 5642507 |
Apparatus for collecting control data of a virtual machine and method of thereof |
| Jun-24-1997 |
An apparatus for collecting control data of a virtual machine in order to collect control data of a control portion (CP) of a virtual machine as well as control data of an operating system (OS) controlled... |
| 5630137 |
Condition handling in a multi-language computer program |
| May-13-1997 |
A condition handling method and means capable of handling programs written in a plurality computer programming languages is created by a set of routines which implement the Common Condition Handling (CCH)... |
| 5613114 |
System and method for custom context switching |
| Mar-18-1997 |
A system for custom context switching comprises a thread accounting unit, a switching routine registration unit, a thread scheduling unit, a custom context switching unit, and a default context switching... |
| 5606696 |
Exception handling method and apparatus for a microkernel data processing system |
| Feb-25-1997 |
Floating point hardware register set is not given to any user level thread unless it is required to perform floating point operations. Thus, for any non-floating thread, its context does not include the... |
| 5530865 |
Method and apparatus for improved application program switching on a computer-controlled display system |
| Jun-25-1996 |
A method and apparatus for transferring control between application programs. A messaging means is provided which allows a first application program to indicate to the messaging means that a second application... |
| 5526521 |
Method and system for process scheduling from within a current context and switching contexts only when the next scheduled context is different |
| Jun-11-1996 |
Method and system for managing process scheduling among multiple control contexts within a data processing environment. A given control context, comprising one of multiple control contexts, is assumed... |
| 5517644 |
Office automation system with interrupt feature |
| May-14-1996 |
A system is disclosed for the automation of virtually all clerical functions in an office, such as for example, an insurance agency. Virtually any document generated by the office may be printed without... |
| 5515538 |
Apparatus and method for interrupt handling in a multi-threaded operating system kernel |
| May-7-1996 |
The disclosed invention is a method and apparatus for use in handling interrupts in a data processing system where the kernel is preemptible, has real-time scheduling ability, and which supports multithreading... |
| 5506988 |
Program-controlled communication installation |
| Apr-9-1996 |
A program-controlled communication installation is composed of at least a digital computer system having a computer core (processor) administered by a multi-tasking operating system and having a system... |
| 5506987 |
Affinity scheduling of processes on symmetric multiprocessing systems |
| Apr-9-1996 |
A method of scheduling processes on a symmetric multiprocessing system that maintains process-to-CPU affinity without introducing excessive idle time is disclosed. When a new process is assigned, the process... |
| 5490272 |
Method and apparatus for creating multithreaded time slices in a multitasking operating system |
| Feb-6-1996 |
A method and apparatus for subdividing a thread's processing cycles among a set of threadlets or regions within a thread or process. This is achieved through instructions in the application code which... |
| 5481719 |
Exception handling method and apparatus for a microkernel data processing system |
| Jan-2-1996 |
Floating point hardware register set is not given to any user level thread unless it is required to perform floating point operations. Thus, for any non-floating thread, its context does not include the... |
| 5469570 |
System for examining statuses of tasks when one task is interrupted in data processing system |
| Nov-21-1995 |
Multiple CPU's are assigned to multiple tasks on a one-to-one basis and execute corresponding tasks under the control of an operating system. Each of the CPU has a transmitter and a receiver. Each transmitter... |
| 5459865 |
Runtime loader |
| Oct-17-1995 |
A method and apparatus for an innovative object oriented framework system is disclosed. The system uses an innovative load architecture for a framework application by multiple users. The load architecture... |
| 5455940 |
Method for abnormal restart of a multiprocessor computer of a telecommunication switching system |
| Oct-3-1995 |
A master processor executes both switching-oriented and nonswitching-oriented functions and the other processors execute only switching-oriented functions. The processes to be executed are rendered independent... |
| 5437047 |
System for gathering and safeguarding program run information of each individual processor by transferring information to an external storage |
| Jul-25-1995 |
A program run information gathering system for a multiprocessor system gathers program run information inclusive of an interrupt masked kernel program from all the processors of the multiprocessor system... |
| 5437039 |
Servicing transparent system interrupts and reducing interrupt latency |
| Jul-25-1995 |
A system management interrupt (SMI) handler comprising a plurality of service tasks is provided a computer system to service SMIs. The service tasks are executed interleavingly with normal execution. A... |
