| 6256658 |
Apparatus for executing a plurality of program segments having different object code types in a single program or processor environment |
| Jul-3-2001 |
The invention provides a method and apparatus for switching between execution of a plurality of object code types having different conventions for invoking program procedures and performing stack manipulations.... |
| 6247109 |
Dynamically assigning CPUs to different partitions each having an operation system instance in a shared memory space |
| Jun-12-2001 |
Multiple instances of operating systems execute cooperatively in a single multiprocessor computer wherein all processors and resources are electrically connected together. The single physical machine with... |
| 6247040 |
Method and structure for automated switching between multiple contexts in a storage subsystem target device |
| Jun-12-2001 |
In a storage target device controller capable of managing multiple command contexts, methods and associated apparatus are provided for automatically managing the plurality of contexts using a state machine... |
| 6243804 |
Single cycle transition pipeline processing using shadow registers |
| Jun-5-2001 |
A system and method for efficiently handling interrupts in a microcontroller environment is disclosed. An interrupt handling circuit preserves a current state of a microcontroller comprising a plurality... |
| 6243736 |
Context controller having status-based background functional task resource allocation capability and processor employing the same |
| Jun-5-2001 |
A context controller for managing multitasking in a processor and a method of operating the same. In one embodiment, the context controller includes: (1) memory that contains contexts corresponding to... |
| 6223274 |
Power-and speed-efficient data storage/transfer architecture models and design methodologies for programmable or reusable multi-media processors |
| Apr-24-2001 |
A programmable processing engine and a method of operating the same is described, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between... |
| 6223208 |
Moving data in and out of processor units using idle register/storage functional units |
| Apr-24-2001 |
In a computer system and a processor which has the capability to do multithreaded processor, the computer system and processor use idle register/storage functional units within the processor core to transfer... |
| 6223207 |
Input/output completion port queue data structures and methods for using same |
| Apr-24-2001 |
A technique for performing multiple simultaneous asynchronous input/output operations in a computer operating system. An input/output completion port object is created and associated with a file descriptor.... |
| 6216220 |
Multithreaded data processing method with long latency subinstructions |
| Apr-10-2001 |
The data processing system, a combination of multithreaded architecture and a VLIW (Very Long Instruction Word) processor is adapted to process plural threads. The system uses multiple program counters... |
| 6212573 |
Mechanism for invoking and servicing multiplexed messages with low context switching overhead |
| Apr-3-2001 |
Data structures, methods and devices for reducing computing overhead by utilizing threads which are effective to listen for requests for new connections, for new requests for services, and process requests... |
| 6209020 |
Distributed pipeline memory architecture for a computer system with even and odd pids |
| Mar-27-2001 |
A computer system architecture in which each processor has its own memory, strategically distributed along the stages of an execution pipeline of the processor, to provide fast access to often used information,... |
| 6208361 |
Method and system for efficient context switching in a computer graphics system |
| Mar-27-2001 |
The present invention comprises a system for implementing efficient context switching in a graphics computer system including a processor subsystem and a graphics pipeline. The system of the present invention... |
| 6205468 |
System for multitasking management employing context controller having event vector selection by priority encoding of contex events |
| Mar-20-2001 |
A context controller for managing multitasking in a processor and a method of operating the same. In one embodiment, the context controller includes: (1) an event recorder that records occurrences of events... |
| 6205467 |
Microprocessor having a context save unit for saving context independent from interrupt requests |
| Mar-20-2001 |
A microprocessor including a context save unit is provided. The context save unit is configured to periodically perform context saves. When the microprocessor receives an interrupt signal, the microprocessor... |
| 6192421 |
Program-controlled device with reloading possibility for and changeover possibility to a second operating system without program interruption by exchanging two address lines each other |
| Feb-20-2001 |
The invention concerns a program-controlled device with reloading possibility for and change-over possibility to a second operating system (GLS1, GLS2, GLS3, GLSx) without program interruption, with a... |
| 6185597 |
Method and system for expanding a buried stack frame |
| Feb-6-2001 |
A method and system for growing stack frames is described. According to the invention, actual growth of a stack frame buried below the top of the stack is delayed until such time as the frame is returned... |
| 6175916 |
Common-thread inter-process function calls invoked by jumps to invalid addresses |
| Jan-16-2001 |
The invention includes a method of making a call from one process to another. The method includes executing a jump instruction from a first process, while specifying an invalid destination address such... |
| 6173391 |
Bossless architecture and digital cell technology for computer programs |
| Jan-9-2001 |
A bossless computer program architecture in which each program module is hierarchically equal is used to develop complicated software applications. Each program module is associated with a parameter file.... |
| 6148326 |
Method and structure for independent disk and host transfer in a storage subsystem target device |
| Nov-14-2000 |
In a storage target device controller capable of managing multiple command contexts, methods and associated apparatus are provided for enabling simultaneous, independent operation of the disk channel and... |
| 6145049 |
Method and apparatus for providing fast switching between floating point and multimedia instructions using any combination of a first register file set and a second register file set |
| Nov-7-2000 |
A system and method is provided that adds another floating point register set in the floating point execution unit of a microprocessor. Thus, when the floating point state, or environment is stored as... |
| 6128730 |
Method and apparatus for multilevel software configuration having administrator and software driven override limiting capabilities |
| Oct-3-2000 |
A configuration system and method uses a program device containing configuration software for configuring applications to be executed by a processing system through the use of externally provided values... |
| 6128713 |
Application programming interface enabling application programs to control allocation of physical memory in a virtual memory system |
| Oct-3-2000 |
An application programming interface (API) enables application programs in a multitasking operating environment to control the allocation of physical memory in a virtual memory system. One API function... |
| 6128641 |
Data processing unit with hardware assisted context switching capability |
| Oct-3-2000 |
The present invention relates to a method of context switching from a first task to a second task in a data processing unit having a register file with a plurality of general purpose registers and a context... |
| 6112292 |
Code sequence for asynchronous backing store switch utilizing both the cover and LOADRS instructions |
| Aug-29-2000 |
A computer implemented method for switching from an interrupted context to an interrupting context in a processor is provided. The processor includes a register stack (RS) that has first and second portions.... |
| 6112196 |
Method and system for managing connections to a database management system by reusing connections to a database subsystem |
| Aug-29-2000 |
A system and method for processing a request utilizing a database management system in a computer system is disclosed. The database management system manages at least one database. At least one database... |
| 6106575 |
Nested parallel language preprocessor for converting parallel language programs into sequential code |
| Aug-22-2000 |
A preprocessor for a nested parallel language converts a program written in the nested parallel language to a sequential programming language and calls to a message passing interface. The sequential programming... |
| 6104873 |
Use of language instructions and functions across multiple processing sub-environments |
| Aug-15-2000 |
An apparatus allowing a pair of interrelated C language operations, in particular a setjmp/longjmp and a signal/raise functions to be completed across a plurality of load modules. Upon the issuance of... |
| 6101599 |
System for context switching between processing elements in a pipeline of processing elements |
| Aug-8-2000 |
A system and technique facilitate fast context switching among processor complex stages of a pipelined processing engine. Each processor complex comprises a central processing unit (CPU) core having a... |
| 6081896 |
Cryptographic processing system with programmable function units and method |
| Jun-27-2000 |
A programmable cryptographic system (100) provides high performance cryptographic processing support for cryptographic algorithms. Two or more independent cryptographic algorithms may be performed at the... |
| 6076157 |
Method and apparatus to force a thread switch in a multithreaded processor |
| Jun-13-2000 |
A system and method for performing computer processing operations in a data processing system includes a multithreaded processor and thread switch logic. The multithreaded processor is capable of switching... |
| 6073159 |
Thread properties attribute vector based thread selection in multithreading processor |
| Jun-6-2000 |
A technique is provided for selecting a preferred thread from a plurality of threads executing within a simultaneous multithreaded, out-of-order execution computer system, the preferred thread possessing... |
| 6065114 |
Cover instruction and asynchronous backing store switch |
| May-16-2000 |
A computer-implemented method of switching contexts in a processor is provided. The processor includes a register stack (RS) that has first and second portions. The processor includes a register stack... |
| 6061711 |
Efficient context saving and restoring in a multi-tasking computing system environment |
| May-9-2000 |
In a multi-tasking computing system environment, one program is halted and context switched out so that a processor may context switch in a subsequent program for execution. Processor state information... |
| 6061710 |
Multithreaded processor incorporating a thread latch register for interrupt service new pending threads |
| May-9-2000 |
A method of using multithreading resources for improving handling instructions is operated by an improved multithreaded processor which includes a context select logic unit being arranged and configured... |
| 6055559 |
Process switch control apparatus and a process control method |
| Apr-25-2000 |
A status management unit manages a free status capable of invoking a process switch and a critical status. When a process currently being executed is in an input/output process or in a critical status... |
| 6052708 |
Performance monitoring of thread switch events in a multithreaded processor |
| Apr-18-2000 |
A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor... |
| 6049818 |
Signal processing device |
| Apr-11-2000 |
Distributed digital signal processing is executed by a number of processing elements. Signal processing processes are scheduled for individual processing elements according to the data flow principle.... |
| 6047122 |
System for method for performing a context switch operation in a massively parallel computer system |
| Apr-4-2000 |
A parallel computer comprises a plurality of processing elements and a control processor all interconnected by a communications network. The control processor and the processing elements process a plurality... |
| 6032174 |
Load sharing system and a method for processing of data and a communication system with load sharing |
| Feb-29-2000 |
The present invention relates to a system and method respectively for processing of data comprising a central processor system comprising at least one signal processor (SPU) for processing and administrating... |
| 6026490 |
Configurable cryptographic processing engine and method |
| Feb-15-2000 |
A configurable cryptographic processing engine (100) provides high performance cryptographic processing support for symmetric combiner type cryptographic algorithms. As many as two independent cryptographic... |
| 6026428 |
Object oriented thread context manager, method and computer program product for object oriented thread context management |
| Feb-15-2000 |
An object oriented thread context manager, a method and computer program product are provided for object oriented thread context management. A context manager is provided for managing a plurality of ContextControl... |
| 6018759 |
Thread switch tuning tool for optimal performance in a computer processor |
| Jan-25-2000 |
A method, apparatus, and article of manufacture for performing thread switch tuning for optimal performance of a program executed by a computer data processing system having a multithreaded processor.... |
| 6009454 |
Multi-tasking operation system for industrial controller |
| Dec-28-1999 |
A multi-tasking operating system for real-time control of industrial processes integrates ladder type programs and state-type programs by viewing each as a series of instructions with an implicit pointer... |
| 6003063 |
Computer system with context switch and program development therefor |
| Dec-14-1999 |
When a first application program raises an error condition, a context switch, in one embodiment, transfers control to one of several Help programs, as selected automatically without user or system operator... |
| 5995752 |
Use of language instructions and functions across multiple processing sub-environments |
| Nov-30-1999 |
A method of allowing a pair of C language operations, in particular a setjmp/longjmp and a signal/raise functions to be completed across a plurality of load modules. Upon the issuance of a first instruction,... |
| 5987495 |
Method and apparatus for fully restoring a program context following an interrupt |
| Nov-16-1999 |
A method and apparatus for fully restoring the context of a user program, including program status word (PSW) and CPU register contents, following an asynchronous interrupt. Upon the occurrence of an asynchronous... |
| 5978910 |
Performing pending interrupts or exceptions when interruptible jumps are detected |
| Nov-2-1999 |
A circuit for processing a jump operation also enables handling pending interrupts or exceptions. The jump operation has an operand specifying a destination address. If an interrupt or exception is pending,... |
| 5974541 |
GPIB system and method which provides asynchronous event notification |
| Oct-26-1999 |
A GPIB system which includes asynchronous event notification. The GPIB application first provides a notify request to GPIB driver level software, preferably an ibnotify call or a GPIB Notify OLE control.... |
| 5961585 |
Real time architecture for computer system |
| Oct-5-1999 |
A method and apparatus for operating a computer system at the interrupt level. Rather than having a primary task list that is interrupted to service interrupts, all tasks derive from interrupts. To this... |
| 5931919 |
State-based object transition control and attribute-based locking |
| Aug-3-1999 |
Temporary states are used transitionally in run-time situations and are unknown to the object database. A temporary state is created if, when an object is performing a requested event, interim work needs... |
