| 6507862 |
Switching method in a multi-threaded processor |
| Jan-14-2003 |
A processor includes logic for attaining a very fast exception handling functionality while executing non-threaded programs by invoking a multithreaded-type functionality in response to an exception condition.... |
| 6496847 |
System and method for virtualizing computer systems |
| Dec-17-2002 |
A virtual machine monitor (VMM) is included in a computer system that has a protected host operating system (HOS). A virtual machine running at least one application via a virtual operating system is connected... |
| 6477562 |
Prioritized instruction scheduling for multi-streaming processors |
| Nov-5-2002 |
A multi-streaming processor has multiple streams for processing multiple threads, and an instruction scheduler including a priority record of priority codes for one or more of the streams. The priority... |
| 6470376 |
Processor capable of efficiently executing many asynchronous event tasks |
| Oct-22-2002 |
The counter 52 is set with an initial value of "1" and is a counter with a maximum value of "4". This counter 52 increments the count value held by the flip-flop 51 in synchronization with a clock signal... |
| 6463527 |
Spawn-join instruction set architecture for providing explicit multithreading |
| Oct-8-2002 |
The invention presents a unique computational paradigm that provides the tools to take advantage of the parallelism inherent in parallel algorithms to the full spectrum from algorithms through architecture... |
| 6449614 |
Interface system and method for asynchronously updating a share resource with locking facility |
| Sep-10-2002 |
Tasks make updates requested by calling tasks to a shared resource serially in a first come first served manner, atomically, but not necessarily synchronously, such that a current task holding an exclusive... |
| 6442585 |
Method for scheduling contexts based on statistics of memory system interactions in a computer system |
| Aug-27-2002 |
A method schedules execution contexts in a computer system based on memory interactions. The computer system includes a processor and a hierarchical memory arranged in a plurality of levels. Memory transactions... |
| 6438677 |
Dynamic handling of object versions to support space and time dimensional program execution |
| Aug-20-2002 |
One embodiment of the present invention provides a system that supports space and time dimensional program execution by facilitating accesses to different versions of a memory element. The system supports... |
| 6437788 |
Synchronizing graphics texture management in a computer system using threads |
| Aug-20-2002 |
A computer system having a graphics display with texture management employs a graphics adapter with texture memory. The graphics adapter is `virtualized` by the operating system. When making a graphics... |
| 6434592 |
Method for accessing a network using programmed I/O in a paged, multi-tasking computer |
| Aug-13-2002 |
A method for sending a message from an application in one networked multi-tasking, paged computer to an application in another networked multi-tasking computer using programmed I/O. A communication link... |
| 6430594 |
Real-time operating system and a task management system therefor |
| Aug-6-2002 |
In a real-time operating system, a plurality of tasks is grouped into blocks in consideration of the deadline times required by each task, switching between tasks that belong to the same block, is not... |
| 6427162 |
Separate code and data contexts: an architectural approach to virtual text sharing |
| Jul-30-2002 |
The present invention provides a processor including a core unit for processing requests from at least one process. The at least one process has a code portion with at least one segment having a first... |
| 6418460 |
System and method for finding preempted threads in a multi-threaded application |
| Jul-9-2002 |
A system and method for inexpensively detecting preempted execution entities such as threads without kernel involvement. In a computer system having a memory and one or more processors, a shared memory... |
| 6408376 |
Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously |
| Jun-18-2002 |
Disclosed is a method, apparatus, and an instruction set architecture (ISA) for an application specific signal processor (ASSP) tailored to digital signal processing (DSP) applications. The instruction... |
| 6408325 |
Context switching technique for processors with large register files |
| Jun-18-2002 |
A computer system and a method for operating a processor including the steps of establishing a first register save area and a second register save area in a memory, where each register save area holds... |
| 6401155 |
Interrupt/software-controlled thread processing |
| Jun-4-2002 |
Rapid thread processing is achieved by transferring complete thread contexts between a memory and a context register set. Each thread context is read from a respective memory location in response to either... |
| 6401138 |
Interface for patient context sharing and application switching |
| Jun-4-2002 |
In a medical information system, a facility is provided so that different application programs can share information about their current state, so that a user of these applications can move more efficiently... |
| 6389487 |
Control of video device by multiplexing accesses among multiple applications requesting access based on visibility on single display and via system of window visibility rules |
| May-14-2002 |
A method and apparatus for allowing several applications to share a single video overlay resource via multiplexing are disclosed. The multiplexing is accomplished from the application end through a multiplexing... |
| 6389449 |
Interstream control and communications for multi-streaming digital processors |
| May-14-2002 |
A multi-streaming processor has a plurality of streams for streaming one or more instruction threads, a set of functional resources for processing instructions from streams; and interstream control mechanisms... |
| 6385637 |
Periodic process timer |
| May-7-2002 |
A periodic process timer is incorporated into a multi-tasking operating system of an automatic call distributor system. The process timing method includes the steps of: a) initializing a plurality of accumulator... |
| 6377971 |
Method and apparatus for installing and executing a single user task in a multi-user environment |
| Apr-23-2002 |
A method and apparatus for installing and executing a single user application on a multi-user system. The method includes the steps of installing a single user application using the installation program... |
| 6374286 |
Real time processor capable of concurrently running multiple independent JAVA machines |
| Apr-16-2002 |
Multiple Java Virtual Machines (JVMs) operate on a single direct execution JAVA processor with each JVM operating in a separate time slice called a partition. Each JVM has its own data and control structures... |
| 6367005 |
System and method for synchronizing a register stack engine (RSE) and backing memory image with a processor's execution of instructions during a state saving context switch |
| Apr-2-2002 |
A computer implemented method in a processor to perform a backing store switch from a first context (source context) to a second context (target context) is provided whereby the backing store memory image... |
| 6360244 |
System and method for multi-level memory domain protection |
| Mar-19-2002 |
A system and method for multi-level memory domain protection. A user process for executing operating system code at a first protection level and user code at a second protection level. A domain process... |
| 6353881 |
Supporting space-time dimensional program execution by selectively versioning memory updates |
| Mar-5-2002 |
A system is provided that facilitates space and time dimensional execution of computer programs through selective versioning of memory elements located in a system heap. The system includes a head thread... |
| 6351808 |
Vertically and horizontally threaded processor with multidimensional storage for storing thread data |
| Feb-26-2002 |
A processor includes a "four-dimensional" register structure in which register file structures are replicated by N for vertical threading in combination with a three-dimensional storage circuit. The multi-dimensional... |
| 6351807 |
Data processing system utilizing multiple resister loading for fast domain switching |
| Feb-26-2002 |
A processor (40) in a data processing system simultaneously loads multiple registers (60) with a single value for fast domain switching. A domain switch instruction asserts a register block write signal... |
| 6351794 |
Computer resource management system |
| Feb-26-2002 |
A system and method for managing scarce computer system memory resources has three aspects. A first aspect allows large data structures to be replaced by a pointer that causes an intentional fault to occur.... |
| 6343261 |
Apparatus and method for automatically diagnosing a technical system with efficient storage and processing of information concerning steps taken |
| Jan-29-2002 |
A device for model-based diagnosis of a technical system, wherein the device determines which parameter is to be measured as the next one, and derives further parameter values from values for specific... |
| 6339771 |
Method and system for managing connections to a database management system |
| Jan-15-2002 |
A system and method for processing a request utilizing a database management system in a computer system is disclosed. The database management system manages at least one database. At least one database... |
| 6334196 |
Estimator program for estimating the availability of an application program that runs in a cluster of at least two computers |
| Dec-25-2001 |
An estimator program is disclosed which performs method steps for estimating the availability of an application program that runs on any computer in a cluster of at least two computers. By the availability... |
| 6330661 |
Reducing inherited logical to physical register mapping information between tasks in multithread system using register group identifier |
| Dec-11-2001 |
A register content inheriting system contributes for realization of register content inheriting with a hardware of simple construction in a multithread multi-processor. Respective thread execution units... |
| 6330626 |
Systems and methods for a disk controller memory architecture |
| Dec-11-2001 |
The present invention is related to systems and methods for a disk controller memory. In one embodiment, a mass storage device is interfaced to a computer via an I/O bus using a mass storage device controller.... |
| 6330583 |
Computer network of interactive multitasking computers for parallel processing of network subtasks concurrently with local tasks |
| Dec-11-2001 |
A local area computer network provides distributed parallel processing. The network comprises a plurality of workstations or personal computers, each having preemptive multitasking for the interactive... |
| 6327650 |
Pipelined multiprocessing with upstream processor concurrently writing to local register and to register of downstream processor |
| Dec-4-2001 |
A multiprocessor system comprises a series of processors arranged to process data in an assembly-line fashion. Each processor includes an executor (execution unit, instruction decoder, and program counter)... |
| 6327631 |
Signal processing apparatus |
| Dec-4-2001 |
A processing apparatus includes a network of interconnected processors comprising a plurality of signal processors for digitally processing input signals in real time to generate output signals and one... |
| 6314510 |
Microprocessor with reduced context switching overhead and corresponding method |
| Nov-6-2001 |
A microprocessor with reduced context switching overhead and a corresponding method is disclosed. The microprocessor comprises a working register file that comprises dirty bit registers and working registers.... |
| 6308319 |
Thread suspension system and method using trapping instructions in delay slots |
| Oct-23-2001 |
By encoding an exception triggering value in storage referenced by an instruction in the delay slot of a delayed control transfer instruction coinciding with a safe point, an efficient coordination mechanism... |
| 6308261 |
Computer system having an instruction for probing memory latency |
| Oct-23-2001 |
A computer system includes a data structure that maintains availability status for registers of a processor of the computer system, wherein the availability status indicates whether an instruction attempting... |
| 6301604 |
Multimedia server |
| Oct-9-2001 |
Multimedia applications including a video and an audio are transmitted at respective adapted transfer rates in a server connected with a networks. The server operates on an operating system which permits... |
| 6298431 |
Banked shadowed register file |
| Oct-2-2001 |
An apparatus and method for improving processor performance during multithreaded processing based on the use of a banked shadowed register file for minimizing thread switch overhead. |
| 6292888 |
Register transfer unit for electronic processor |
| Sep-18-2001 |
A processing system has an instruction processor (IP), register files for storing data to be processed by the IP, such as a thread context, and a register transfer unit (RTU) connected to the register... |
| 6292821 |
Information processing |
| Sep-18-2001 |
An information processing system includes: a first data pool containing information in the form of data items; a plurality of processing elements disposed within the first data pool for processing data... |
| 6289396 |
Dynamic programmable mode switching device driver architecture |
| Sep-11-2001 |
A device driver architecture that couples an operating system to a computer interface of a controller device that includes a plurality of functional sub-elements. The device driver includes a plurality... |
| 6286027 |
Two step thread creation with register renaming |
| Sep-4-2001 |
An apparatus and method in digital processing provides a simple and efficient way of communicating parameters from a parent thread to child thread with two step thread creation. The method comprising the... |
| 6285888 |
Mobile telephone arranged to receive and transmit digital data samples of encoded speech |
| Sep-4-2001 |
A communication device, such as a mobile telephone, has a digital signal processor, fast randomly accessible storage and relatively slow storage devices. Instructions are transferred from the slow storage... |
| 6282638 |
Virtual shadow registers and virtual register windows |
| Aug-28-2001 |
A direct memory access and direct register access (DMA/DRA) controller and method are used on microprocessors, microcontrollers and digital signal processors which incorporate shadow register sets or register... |
| 6275749 |
Interrupt-controlled thread processing |
| Aug-14-2001 |
Rapid thread processing is performed by associating thread contexts stored in a remote memory with interrupts for controlling the operation of a hardware-accelerated processor. This both minimizes the... |
| 6272520 |
Method for detecting thread switch events |
| Aug-7-2001 |
A method for detecting thread switch conditions provides first and second scoreboard bits for each register in a register file. The first scoreboard bit associated with a register is set when a load is... |
| 6256775 |
Facilities for detailed software performance analysis in a multithreaded processor |
| Jul-3-2001 |
A method, apparatus, and article of manufacture for monitoring performance of an application or a system program executed by a multithreaded processor arranged and configured to process a plurality of... |
