| 7043729 |
Reducing interrupt latency while polling |
| May-9-2006 |
Systems, methods, and software for reducing system management interrupt (SMI) latency while operating in system management mode. The present invention implements a technique for exiting system management... |
| 7024672 |
Process-mode independent driver model |
| Apr-4-2006 |
Methods, systems, and computer program products that, by defining a common interface, allow for a single implementation of operations common to both kernel mode and user mode processing, relative to a... |
| 7016891 |
System and method for performing context checks |
| Mar-21-2006 |
A system and method is described which provides for context checking of an operating environment. A context manager controls the execution of context checks requested by applications or processes. In one... |
| 7007119 |
System and method for supporting split transactions on a bus |
| Feb-28-2006 |
System and method for supporting split transactions on a bus. The method may comprise processing a periodic frame list of external bus data frame by frame, and traversing each frame node by node. When... |
| 6996828 |
Multi-OS configuration method |
| Feb-7-2006 |
A physical memory of a single computer is divided for each of a plurality of operating system (OS). A first OS is first loaded into the computer and runs. A multi-OS management program common to a plurality... |
| 6996699 |
Secondary processor execution kernel framework |
| Feb-7-2006 |
Preparing one or more secure media effect programs, generating a binary image of the programs and associated data, loading the binary image into memory of a secondary processor, and executing the programs... |
| 6993556 |
Context administrator |
| Jan-31-2006 |
A context management and administration system includes a context manager, which manages the context of plural applications programs, and an administration suite, which oversees and manages the manager.... |
| 6990669 |
Real-time scheduler |
| Jan-24-2006 |
Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU resources to a thread. When it is time to allocate... |
| 6990479 |
Communication system and method of non-intrusive performance data polling |
| Jan-24-2006 |
The present invention discloses a communication system including an entire object including multiple objects connected with the networks and storing the object's own data, a database including a polling... |
| 6988142 |
Method and apparatus for handling communication requests at a server without context switching |
| Jan-17-2006 |
Method and apparatus for handling communication requests at a server without context switching. An application protocol subsystem and protocol modules are disposed within an operating system kernel at... |
| 6986142 |
Microphone/speaker system with context switching in processor |
| Jan-10-2006 |
A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are... |
| 6986141 |
Context controller having instruction-based time slice task switching capability and processor employing the same |
| Jan-10-2006 |
A context controller for managing multitasking in a processor and a method of operating the same. In one embodiment, the context controller includes: (1) a time slice instruction counter that counts a... |
| 6981261 |
Method and apparatus for thread switching within a multithreaded processor |
| Dec-27-2005 |
A method of performing a thread switching operation within a multithreaded processor. The dispatch of a first predetermined quantity of instruction information for a first thread, from an instruction streaming... |
| 6981083 |
Processor virtualization mechanism via an enhanced restoration of hard architected states |
| Dec-27-2005 |
A method and system are disclosed for pre-loading a hard architected state of a next process from a pool of idle processes awaiting execution. When an executing process is interrupted on the processor,... |
| 6976155 |
Method and apparatus for communicating between processing entities in a multi-processor |
| Dec-13-2005 |
A method and apparatus for synchronizing and communicating between processing entities, such as cores or threads, in a multiprocessor. Two registers are used as a "hardware mailbox" by two processing entities... |
| 6971104 |
Method and system to perform a thread switching operation within a multithreaded processor based on dispatch of a quantity of instruction information for a full instruction |
| Nov-29-2005 |
A method of performing a thread switching operation within a multithreaded processor includes detecting dispatch of a first predetermined quantity of instruction information of a first thread, from an... |
| 6971103 |
Inter-thread communications using shared interrupt register |
| Nov-29-2005 |
A multithreaded processor includes an interrupt controller for processing a cross-thread interrupt directed from a requesting thread to a destination thread. The interrupt controller in an illustrative... |
| 6965961 |
Queue-based spin lock with timeout |
| Nov-15-2005 |
A queue-based spin lock with timeout allows a thread to obtain contention-free mutual exclusion in fair, FIFO order, or to abandon its attempt and time out. A thread may handshake with other threads to... |
| 6964047 |
Method and apparatus for a fast process monitor suitable for a high availability system |
| Nov-8-2005 |
An application initiates a parent process (102) to begin executing the application. The parent process (102) creates a child process (104) to execute the application. The parent monitors... |
| 6957431 |
System for incrementally computing the maximum cost extension allowable for subsequent execution of each task using fixed percentage of the associated cost |
| Oct-18-2005 |
The present invention provides a method, system, and computer program product for improving scheduling of tasks in systems that accumulate execution time. An upper bound is computed on the amount of additional... |
| 6954933 |
Method and apparatus for providing and integrating high-performance message queues in a user interface environment |
| Oct-11-2005 |
A method and apparatus is provided for providing and integrating high-performance message queues. "Contexts" are provided that allow independent worlds to be created and execute in parallel. A context... |
| 6952214 |
Method for context switching a graphics accelerator comprising multiple rendering pipelines |
| Oct-4-2005 |
A graphics system comprising a plurality of rendering pipelines and a scheduling network. Each rendering pipeline couples to the scheduling network, and includes a media processor, a rendering unit and... |
| 6931641 |
Controller for multiple instruction thread processors |
| Aug-16-2005 |
A mechanism controls a multi-thread processor so that when a fist thread encounters a latency event to a first predefined time interval temporary control is transferred to an alternate execution thread... |
| 6928647 |
Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor |
| Aug-9-2005 |
The present invention provides a method and apparatus for controlling a processing priority assigned alternately to a first thread and a second thread in a multithreaded processor to prevent deadlock and... |
| 6922835 |
Techniques for permitting access across a context barrier on a small footprint device using run time environment privileges |
| Jul-26-2005 |
A small footprint device can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs. The context barrier performs security checks... |
| 6910213 |
Program control apparatus and method and apparatus for memory allocation ensuring execution of a process exclusively and ensuring real time operation, without locking computer system |
| Jun-21-2005 |
A program control apparatus ensuring real time response by ensuring execution of a process exclusively without locking the system includes a unit responsive to an application program interface call from... |
| 6907608 |
Techniques for permitting access across a context barrier in a small footprint device using global data structures |
| Jun-14-2005 |
A small footprint device can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs. The context barrier performs security checks... |
| 6904511 |
Method and apparatus for register file port reduction in a multithreaded processor |
| Jun-7-2005 |
Techniques for thread-based register file access by a multithreaded processor are disclosed. The multithreaded processor determines a thread identifier associated with a particular processor thread, and... |
| 6895583 |
Task control block for a computing environment |
| May-17-2005 |
A task control block is implemented to provide more efficient user task access to task-specific variables and context information. The task control block uses multiple portions located in both protected... |
| 6886165 |
Method for the direct call of a function by a software module by means of a processor with a memory-management unit (MMU) |
| Apr-26-2005 |
A method for the direct call of a target function by a start function by means of a processor with a memory management unit (MMU) in a computer operated by an operating system. In today's multitasking... |
| 6883171 |
Dynamic address windowing on a PCI bus |
| Apr-19-2005 |
A multi-tasking operating system and method updates PCI address values in an extension register to ensure that various threads utilize the correct values when accessing peripheral PCI devices. When application... |
| 6874145 |
Methods and apparatus for implementing an application lifecycle design for applications |
| Mar-29-2005 |
Methods and apparatus for managing execution of an application according to an application lifecycle. The application lifecycle is managed by an application manager through a set of commands that enable... |
| 6874080 |
Context processing by substantially simultaneously selecting address and instruction of different contexts |
| Mar-29-2005 |
A processing system that executes multiple instruction contexts includes an instruction memory for storing instructions that are executed by the system, a processor unit executing the instructions in a... |
| 6865740 |
Method and system to insert a flow marker into an instruction stream to indicate a thread switching operation within a multithreaded processor |
| Mar-8-2005 |
A method of performing a thread switching operation within a multithreaded processor includes detecting the dispatch of a first predetermined quantity of instruction information of a first thread, from... |
| 6854118 |
Method and system to perform a thread switching operation within a multithreaded processor based on detection of a flow marker within an instruction information |
| Feb-8-2005 |
A method of performing a thread switching operation within a multithreaded processor includes detecting dispatch of a first predetermined quantity of instruction information of a first thread, from an... |
| 6854051 |
Cycle count replication in a simultaneous and redundantly threaded processor |
| Feb-8-2005 |
A pipelined, simultaneous and redundantly threaded ("SRT") processor comprising, among other components, load/store units configured to perform load and store operations to or from data locations such... |
| 6848104 |
Clustering of task-associated objects for effecting tasks among a system and its environmental devices |
| Jan-25-2005 |
Tasking systems and methods are provided that support user interfaces for displaying objects, the displayed objects enabling user access to resources that provide for effecting tasks among the system and... |
| 6845506 |
System and method for multi-level memory domain protection |
| Jan-18-2005 |
A system and method for multi-level memory domain protection. A user process for executing operating system code at a first protection level and user code at a second protection level. A domain process... |
| 6845501 |
Method and apparatus for enabling a compiler to reduce cache misses by performing pre-fetches in the event of context switch |
| Jan-18-2005 |
A method for reducing cache memory misses in a computer that performs context switches between at least a first context and a second context. A First logic identifies a first prefetch region in a first... |
| 6842848 |
Method and apparatus for token triggered multithreading |
| Jan-11-2005 |
Techniques for token triggered multithreading in a multithreaded processor are disclosed. An instruction issuance sequence for a plurality of threads of the multithreaded processor is controlled by associating... |
| 6831654 |
Data processing system |
| Dec-14-2004 |
A data processing system comprising a block move engine, a memory, a register and a reader. The block move engine may be configured to process data. The memory may be configured to store data in the form... |
| 6829767 |
Method to control alternative application operation based on results of an ordered application execution attempt |
| Dec-7-2004 |
A method, system and computer readable instructions for executing a file with a file format is provided. An attempt is made to execute the file with a first computer application within a plurality of computer... |
| 6829766 |
Data processing method and apparatus and recording medium, for implementing a schedule managing mechanism when a context switch has occurred |
| Dec-7-2004 |
An operating system is provided that employs a nano-kernel and that reduces the number of times of revocation of a scheduler without impairing operation of a system incorporating the operating system.... |
| 6826755 |
Systems and methods for switching internet contexts without process shutdown |
| Nov-30-2004 |
Systems and methods for switching from a first Internet context to a second Internet context without process shutdown are described. Internet context data, such as cookies, history and user-defined data,... |
| 6826681 |
Instruction specified register value saving in allocated caller stack or not yet allocated callee stack |
| Nov-30-2004 |
A method and apparatus provide means for saving and restoring processor register values and allocating and deallocating stack memory. A first field of a save instruction encodes whether a value in a register... |
| 6823520 |
Techniques for implementing security on a small footprint device using a context barrier |
| Nov-23-2004 |
A small footprint device, such as a smart card, can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs. The context barrier... |
| 6823524 |
System and method for managing the distribution of events in a data processing system |
| Nov-23-2004 |
A system and method are disclosed for distributing events in a data processing system from an event generator to an event recipient, while retaining processing control at the event generator. A manager... |
| 6823516 |
System and method for dynamically adjusting to CPU performance changes |
| Nov-23-2004 |
In a computer system having a processor capable of operating at a plurality of performance states, including a first and a second performance state, wherein while the processor operates in any of the performance... |
| 6823517 |
Multi-tasking-real-time operating system for microprocessors with limited memory that constrains context switching to occur only at task level |
| Nov-23-2004 |
A real-time operating system (RTOS) for use with minimal-memory controllers has a kernel for managing task execution, including context switching, a plurality of defined tasks, individual ones of the tasks... |
| 6820269 |
Method and apparatus for improving performance in a network with high delay times |
| Nov-16-2004 |
Method and a device are disclosed for a fast performance of network operations via a network with high delay times by means of a module for processing system calls of an application layer and for initiating... |
