Determining maximum number of live registers by recording relevant events of the execution of a computer program

Abstract

The present invention is a method and apparatus for compiler optimization that determines the maximum number of live computer registers, or pressure point. The present invention improves the productivity of a software developer by reducing compilation time of a computer program. More particularly, the overhead required during compilation to search information to determine the maximum number of live registers is reduced. The present invention records the relevant events related to the execution of a computer program, as opposed to a comprehensive history of the read instructions and write instructions. Also, the present invention maintains information about the maximum number of live registers for any partition related to the execution of a computer program. The present invention may bound the required system resources required to determine the maximum number of live registers to the number of registers associated with the number of partitions.

Claims

What is claimed is:

1. A method for determining the maximum number of live registers in a computer system, said computer system having an executing computer program having at least one instruction that accesses said registers, said method including the steps of:

including a read instruction in said instructions, said live registers being associated with said read instruction;

associating events in said computer program with said instructions, and thereby associating said accessed registers with said events;

wherein, for each said event, said method further comprises the steps of:

identifying a number of accessed registers associated with said event that are live, and representing the number of live registers by a number_of_live registers variable;

identifying a number of accessed registers about which information is known, and representing the number of accessed registers about which information is known by a registers_with_known_information variable;

recording a register pressure information value associated with said event, said register pressure information value associated with said event including:

(i) a number_of_live registers variable that represents a number of said accessed registers associated with said event that are live; and

(ii) a registers_with_known_information value that represents a number of said accessed registers associated with said event about which information is known;

when said registers_with_known_information variable represents registers that have not previously been touched with respect to said event;

retaining a previously recorded register pressure information variable when a registers_with_known_information variable associated with said previously recorded register pressure information variable is equivalent to said registers_with_known_information variable included in said pressure information variable associated with said event;

retaining a register pressure information variable with a largest value of said number_of_live_registers variable when

(i) said number_of_live_registers variable has a different value than a number_of_live_registers variable included in a retained previously recorded register pressure information variable; and

(ii) said registers_with_known_information variable is equivalent to a registers_with_known_information variable of said retained previously recorded register pressure information variable;

retaining one said register pressure information variable associated with said event when a plurality of said register pressure information variables is associated with said event, and said number_of_live_registers variables and said registers_with_known_information variables included in each of said plurality of said register pressure information variables are equivalent; and

determining a largest value of number_of_live_registers variables included in retained register pressure information variables associated with said events in said computer program and thereby identifying said maximum number of live registers in said computer system.

2. The method as set forth in claim 1, further comprising the step of associating said register pressure variable corresponding to said event with an uncertainty level variable that represents a number of registers associated with said event that have not been touched, wherein said step of associating said register pressure variable includes the step of working from said register pressure information variable associated with a lowest value of said uncertainty level variable to said register pressure information variable associated with a highest value of said uncertainty level variable.

3. The method as set forth in claim 1, further comprising the step of including a write instruction in said instructions, wherein registers accessed by said write instruction are dead registers and touched registers, thereby identifying said touched registers as dead or live.

4. The method as set forth in claim 1, further comprising the step of including a time interval variable in said register pressure information variable, thereby associating said event with time during execution of said computer program.

5. The method as set forth in claim 1, further comprising the step of executing the computer program by a compilation system, thereby improving compilation in said computer system by determining said maximum number of live registers in said computer system.

6. The method as set forth in claim 1, wherein said method identifies the maximum number of live registers for each of a plurality of partitions.

7. An article of manufacture comprising a program storage medium having computer readable program code embodied therein for determining the maximum number of live registers in a computer system, said computer system having an executing computer program having at least one instruction that accesses said registers, wherein a read instruction is included in said instructions, said live registers being associated with said read instruction, and wherein events in said computer program are associated with said instructions, thereby associating said accessed registers with said events and said partition, comprising:

computer readable code for identifying a number of accessed registers associated with said event that are live, and representing the number of live registers by a number_of_live_registers variable;

computer readable code for identifying a number of accessed registers about which information is known, and representing the number of accessed registers about which information is known by a registers_with_known_information variable;

computer readable code for identifying said partition associated with said event and representing said partition by a partition variable associated with said event;

computer readable code for recording a register pressure information value associated with said event, said register pressure information value associated with said event including:

(i) a number_of_live_registers variable that represents a number of said accessed registers associated with said event that are live;

(ii) a registers_with_known_information value that represents a number of said accessed registers associated with said event about which information is known; and

(iii) a partition variable that represents a partition associated with said event

when said registers_with_known_information variable represents registers that have not previously been touched with respect to said event;

computer readable code for retaining a previously recorded register pressure information variable when a registers with_known_information variable associated with said previously recorded register pressure information variable is equivalent to said registers_with_known_information variable included in said pressure information variable associated with said event;

computer readable code for retaining a register pressure information variable with a largest value of said number_of_live_registers variable when

(i) said number_of_live_registers variable has a different value than a number_of_live_registers variable included in a retained previously recorded register pressure information variable; and

(ii) said registers_with_known_information variable is equivalent to a registers_with known_information variable of said retained previously recorded register pressure information variable;

computer readable code for retaining one said register pressure information variable associated with said event when a plurality of said register pressure information variables is associated with said event, and said number_of_live_registers variables and said registers_with_known_information variables included in each of said plurality of said register pressure information variables are equivalent; and

computer readable code for determining a largest value of number_of_live_registers variables included in retained register pressure information variables associated with said events in said computer program and thereby identifying said maximum number of live registers in said computer system.

8. An article of manufacture as set forth in claim 7, further comprising computer readable code for associating said register pressure variable corresponding to said event with an uncertainty level variable that represents a number of registers associated with said event that have not been touched, wherein said computer readable code for associating said register pressure variable includes computer readable code for working from said register pressure information variable associated with a lowest value of said uncertainty level variable to said register pressure information variable associated with a highest value of said uncertainty level variable.

9. An article of manufacture as set forth in claim 7, further including a write instruction in said instructions, wherein registers accessed by said write instruction are dead registers and touched registers, thereby identifying said touched registers as dead or live.

10. An article of manufacture as set forth in claim 7, wherein said register pressure information variable further includes a time variable, thereby associating said event with time during execution of said computer program.

11. An article of manufacture as set forth in claim 7, wherein said computer system further includes a compilation system for executing the computer program, thereby improving compilation in said computer system by determining said maximum number of live registers in said computer system.

12. An article of manufacture as set forth in claim 7, further computer readable code for identifying a maximum number of live registers for each of a plurality of partitions.

Description

FIELD OF THE INVENTION

The present invention relates generally to a method and apparatus for optimizing compilers by determining the maximum number of live registers used during the execution of a computer program.

BACKGROUND OF THE INVENTION

Almost all microprocessors have a load-store architecture in which values are loaded from memory into registers, operations are performed on values loaded in the registers, and the resulting values are again stored into memory. Register allocation, which is typically a function of compilation systems, determines the values that may access the registers of a computer system during any point in the execution of a program. Accordingly, register allocation is an important technique of compiler optimization because the number of computer registers is limited and because register operations are performed faster than memory loads and stores. Register allocation is discussed with reference to Advanced Compiler Design and Implementation, Steven S. Myuchnick, 1997.

Some methods for optimizing register allocation limit the allocation of values to computer registers, to periods when an instruction associated with the value is live. It will be appreciated that a code instruction may be associated with a value, and the value is referred to as "live" during the time period in which the value may be executed. Also, the register accessed by the value is termed a "live register" during the period that the value is live. The range of code instructions in which the value is live is referred to as a live range of the value. While a value is live it is desirable to allocate a register to the value to enable instruction processing to continue without storing the value in memory, and the allocated register may be referred to as a live register. Values may reside in virtual registers and virtual registers may represent hardware registers. As used herein the phrase computer registers, represents those registers that are visible to the software developer.

Prior register allocation solutions included recording a history of read instructions and write instructions and searching the recorded events to find the maximum number of live registers, sometimes referred to as the maximum pressure point, at a particular point in the execution of the program. Therefore, the comprehensive read instruction and write instruction history related to the execution of a program must be stored, and that results in a large amount of time required for compiler optimization. It will be appreciated by those skilled in the art, that compiler optimization uses the value of the maximum number of live registers to efficiently manager register allocation.

Since the number of samples to be searched is large, the associated large amount of computing resources and searching time has inhibited improvements in compiler optimization. As known to those skilled in the art, compiler optimization is solutions that increase the computer overhead necessary for compilation, reduce the usefulness of the optimization solution and reduce the productivity of software development engineers. This reduction in productivity and increase in computer system requirements has limited further improvement of software development techniques.

SUMMARY OF THE INVENTION

The present invention is a method and apparatus for determining the maximum number of live computer registers, or pressure point. Software developers typically follow a work cycle of development, debugging, and testing of code. The productivity of a software developer can be improved by reducing the time spent in any part of the development cycle. Development and debugging productivity primarily depends on compilation time. Therefore it is important to continue to create compiler optimization tools that improve the compilation process.

Accordingly it is an object of the invention to record the relevant events related to the execution of a computer program, as opposed to a comprehensive history of the read instructions and write instructions. That is, during the operation of the present embodiment events that do not affect the maximum number of live registers are not recorded.

It is also an object of the invention to maintain information about the maximum number of live registers for any partition related to the execution of a computer program. It will be understood that a partition may identify sub-sets of information related to the operation of the present invention.

It is also an object of the invention to reduce the overhead required to search the information related to execution of a computer program to determine the maximum number of live registers. Further, the present invention may bound the required system resources required to determine the maximum number of live registers to the number of registers associated with the number of partitions.

Accordingly, it is an object of the invention to improve software developer productivity by reducing the overhead required to search the information about execution to determine the maximum number of live registers.

Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are incorporated in and constitute a part of this specification and, together with the description, explain the advantages and principles of the invention. In the drawings,

FIG. 1A is a block diagram that illustrates a register pressure tool that operates in a computer system;

FIG. 1B is a block diagram that illustrates a form of compiler technology including the register pressure tool;

FIG. 1C is a block diagram that illustrates a form of computer simulation including the register pressure tool;

FIG. 2 is a block diagram that illustrates data structures and functions used by the register pressure tool that may be stored in the memory;

FIG. 3 is a block diagram that illustrates scenarios of a range that may be considered live or dead;

FIG. 4A is a flow diagram that illustrates a typical scenario of instruction events;

FIG. 4B is a block diagram that illustrates the information that the register pressure tool maintains and manages;

FIG. 4C is a flow diagram that illustrates the operation of the register pressure tool;

FIG. 5A is a flow diagram that illustrates a typical scenario of instruction events and that includes partitioning;

FIG. 5B is a block diagram that illustrates the information that the register pressure tool maintains and manages when the information is partitioned; and

FIG. 5C is a flow diagram of the operation of the register pressure tool when the information is partitioned.

DETAILED DESCRIPTION

In the following detailed description and in the several figures of the drawings, like elements are identified with like reference numerals.

Broadly stated, FIG. 1A illustrates a register pressure tool 102 that operates in a computer system 100 and that determines the number of live registers related to the execution of a computer program thereby improving the efficiency of register allocation during compiler optimization.

The register pressure tool 102 includes instructions 208 (as shown in FIG. 2) and data that may be referred to as values such as integer, real, or complex numbers; or characters. Alternately, the values may be pointers that reference values. Therefore, a pointer provides direction to locate a referenced value.

More particularly, the instructions 208 may be operating instructions of the computer system 100, such as addresses. The addresses may be computer addresses or virtual, symbolic addresses that refer to computer addresses. For instance, a computer address may be a computer hardware register 411 or a location in the memory 106. Software instructions 208 may also include variables 209 (as shown in FIG. 2) that are identifiers for values. That is, the variables 209 may identify storage for values.

FIG. 1A further represents the computer system 100 that includes components such as a processor 104, the memory 106, a data storage device 140, an input/output (I/O) adapter 142, a communications adapter 144, a communications network 146, a user interface adapter 150, a keyboard 148, a mouse 152, a display adapter 154, and a computer monitor 156. It will be understood by those skilled in the relevant art that there are many possible configurations of the components of the computer system 100 and that some components that may typically be included in the computer system 100 are not shown.

It will be understood by those skilled in the art that the functions ascribed to the register pressure tool 102, or any of its functional files, typically are performed by a central processing unit that is embodied in FIG. 1A as the processor 104 executing such software instructions 208.

The processor 104 typically operates in cooperation with other software programs such as the compilation system 108, the operating system (O.S.) 111, and the register pressure tool 102. Henceforth, the fact of such cooperation among the processor 104 and the register pressure tool 102, whether implemented in software, hardware, firmware, or any combination thereof, may therefore not be repeated or further described, but will be implied. The register pressure tool 102 may operate under the control of the O.S. 111.

The computer system 100 may include a simulator 180. The simulator 180 is a model of a computer system 100 and is described in detail with respect to FIG. 1C.

The O.S. 111 may cooperate with a file system 116 that manages the storage and access of files within the computer system 100. Files typically include instructions 208 and data. The interaction between the file system 116 and the O.S. 111 will be appreciated by those skilled in the art.

It will also be understood by those skilled in the relevant art that the functions ascribed to the register pressure tool 102 and its functional files, whether implemented in software, hardware, firmware, or any combination thereof, may in some embodiments be included in the functions of the O.S. 111. That is, the O.S. 111 may include files from the register pressure tool 102. In such embodiments, the functions ascribed to the register pressure tool 102 typically are performed by the processor 104 executing such software instructions 208 in cooperation with aspects of the O.S. 111 that incorporate the register pressure tool 102. Therefore, in such embodiments, cooperation by the register pressure tool 102 with aspects of the O.S. 111 will not be stated, but will be understood to be implied.

Computer memory 106 may be any of a variety of known memory storage devices or future memory devices, including any commonly available random access-memory (RAM), cache memory, magnetic medium such as a resident hard disk, or other memory storage devices. In one embodiment the O.S. 111 and the register pressure tool 102 may reside in the memory 106 during execution in the computer system 100.

The compilation system 108 and the O.S. 111 may also reside in the memory 106 when the register pressure tool 102 is operating. Further, the compilation system 108 may operate in cooperation with the O.S. 111 to execute the register pressure tool 102. That is, the present embodiment may employ the compilation system 108 to resolve any system-specific information such as address locations that are necessary to execute the register pressure tool 102 in the computer system 100.

It will be appreciated that "execute" refers to the process of manipulating software or firmware instructions 208 for operation on the computer system 100. The term "code" refers to instructions 208 or data used by the computer system 100 for the purpose of generating instructions 208 or data that execute in the computer system 100. Also, the term "function" may refer to a software "procedure" such as a unit of software that may be independently compiled. A "program" contains software program code, may contain at least one function, and may be independently compiled and executed.

Alternatively programs that operate by an object-oriented design, in which the data associated with an object helps to determine the operation of the object, may cooperate with elements of the compilation system 108 and the register pressure tool 102 to interpret programs for execution in the computer system 100 and thereby to manage allocation of the use of the registers 411. For example the product marketed under the trademark JAVA VIRTUAL MACHINE.TM. may operate in the computer system 100 on programs created in program code marketed under the trademark JAVA..TM. Such JAVA.TM. programs may cooperate with the register pressure tool 102 and thereby manage allocation of the use of the registers 411.

The register pressure tool 102 may be implemented in the "C" programming language, although it will be understood by those skilled in the relevant art that other programming languages could be used. Also, the register pressure tool 102 may be implemented in any combination of software, hardware, or firmware.

The data storage device 140 may be any of a variety of known or future devices, including a compact disk drive, a tape drive, a removable hard disk drive, or a diskette drive. Any such program storage device may communicate with the I/O adapter 142, that in turn communicates with other components in the computer system 100, to retrieve and store data used by the computer system 100. As will be appreciated, such program storage devices typically include a computer usable storage medium having stored therein a computer software program and data.

Input devices could include any of a variety of known I/O devices for accepting information from a user, whether a human or a machine, whether local or remote. Such devices include, for example a keyboard 148, a mouse 152, a touch-screen display, a touch pad, a microphone with a voice recognition device, a network card, or a modem. The input devices may communicate with a user interface I/O adapter 142 that in turn communicates with components in the computer system 100 to process I/O commands. Output devices could include any of a variety of known I/O devices for presenting information to a user, whether a human or a machine, whether local or remote. Such devices include, for example, the computer monitor 156, a printer, an audio speaker with a voice synthesis device, a network card, or a modem. Output devices such as the monitor 156 may communicate with the components in the computer system 100 through the display adapter 154. Input/output devices could also include any of a variety of known data storage devices 140 including a compact disk drive, a tape drive, a removable hard disk drive, or a diskette drive.

By way of illustration, code may typically be loaded through an input device and may be stored on the data storage device 140. A copy of the code or portions of it, may alternatively be placed by the processor 104 into the memory 106 for execution on the computer system 100.

The computer system 100 may communicate with the network 146 through a communications adapter 144, such as a networking card. The network 146 may be a local area network, a wide area network, or another known computer network or future computer network. It will be appreciated that the I/O device used by the register pressure tool 102 may be connected to the network 146 through the communications adapter 146 and therefore may not be co-located with the computer system 100. It will be further appreciated that other portions of the computer system 100, such as the data storage device 140 and the monitor 156, may be connected to the network 146 through the communications adapter 144 and may not be co-located.

As shown in FIG. 1B the present embodiment is a form of compiler technology that may use software source code 160 that is generated from input computer system 100 I/O devices including a keyboard 148 (as shown in FIG. 1A) and a mouse 152. It will be appreciated that the present embodiment operates on any multi-purpose computer system 100 and is not limited to the illustration herein. A software developer may create source code 160 typically in a high-level programming language such as "C." The computer system 100 may manage the processing of the source code 160 by the O.S. 111 that may direct the processing of the source code 160 by a compiler front-end 162. The compiler front-end 162 may generate intermediate code 164 from the source code 160 and may operate on high-level intermediate code 164. The front-end 162 may optimize code while preserving the structure and sequence of source operations. For instance, the front-end 162 may optimize array contents while retaining the array accesses in the source code 160.

Optimization techniques are utilized by the present embodiment and may generate intermediate code 164 that is processed by an optimizing back-end 166. The intermediate code 164 is a list of intermediate-level language instructions 208 and the maximum register pressure tool 102 may operate on the intermediate code 164. It will be appreciated by those skilled in the art that the techniques such as data flow analysis may be employed to identify relevant information, such as data flow information, that the register pressure tool 102 may access as it operates on the intermediate code 164. By the use of information such as data flow information, the register pressure tool 102 may generate information that determines the maximum register pressure for intermediate code 164 by a specified traversal of the intermediate code 164.

It will be appreciated that the present embodiment may operate with programs that may be dynamically included during program execution. Therefore, whether the program is executing by conventional compiler techniques, by simulation, or by a future execution technology, the present embodiment may operate on code during execution. For example, the present embodiment may operate to determine the register pressure of code that includes dynamically linked libraries. Those skilled in the art will appreciate the use of dynamically linked libraries.

After the maximum register pressure tool 102 has operated on the intermediate code 164, the maximum register pressure tool 102 delivers register pressure information to the optimizing back end 166. If the code semantics can be preserved, the optimizing back-end 166 may move instructions 208 to locations where they are performed less frequently, thereby isolating frequently used instructions 208 for further optimization. The optimizing back-end 166 may generate object code 168 that, includes optimization changes which may be dependent on the particular multi-purpose computer system 100 on which the compiler optimizer technology operates. These machine-specific changes may allow the optimizing back-end 166 to generate code that is highly tailored to optimally run on a specific multi-purpose computer system 100; for example code may be tailored to support different cache organizations, or a different number of computer processors 104 (as shown in FIG. 1A). Further, the optimizing back-end 166 may execute the intermediate code 164 more than once and thereby may make iterative changes in the intermediate code 164 to enhance further processing by the optimizing back-end 166.

In the present embodiment the linker 170 may operate on the output of the back-end 166 which may be object code 168. In order to execute the object code 168 it may be combined with one or more object code modules to create combined user process executable code 172 by a process known as linking. The present embodiment may employ a linker 170 to resolve any undefined computer location references in the object code 168 and to generate executable code 172 capable of executing on an output multi-purpose computer system 100 with I/O devices such as a keyboard 148 and a mouse 152. It will be appreciated that the input computer system 100 and the output computer system 100 may be the same computer system 100 and are not limited to the configuration illustrated.

In the present embodiment the executable code 172 is formatted to enable a loader 174 to load the executable code 172 into the computer system 100 for execution. The executable code 172 may be any of a variety of known executable files or an executable file of a type to be developed in the future. Examples of such known files are those-having an extension of ".exe" operating under a DOS or Windows operating system or an "a.out" file of a UNIX.RTM. operating system. It will be appreciated that typically the compilation system 108 may include the front-end 162, the optimizing back-end 164, the linker 170, and the loader 174. The register pressure tool 102 may also be included in the compilation system 108.

FIG. 1C is a block diagram of a simulation of a computer system 100. The present embodiment may operate on a simulator 180, such as the one illustrated in FIG. 1C. It will be appreciated by those skilled in the art that the simulator 180 may operate in software, firmware, or hardware and is a model of another computer system 100 that may be referred to as a "target."

The computer system 100 may manage the processing of the object code 168 that has been generated by a compilation system 108 such as the one described with reference to FIG. 1B. The linker 170 may generate executable code 172 capable of executing on the computer system 100. The computer system 100 may also direct the processing of the executable code 172 by the simulator 180, thereby executing the executable code 172 by the simulator 180. That is, the simulator 180 may in turn process the executable code 172 and thereby generate executed simulation results 182 that are consistent with the execution results that would occur when the object code 168 is executed directly on the target computer system 100.

In the present embodiment the register pressure tool 102 may be considered an element of the simulator 180. Therefore, as the simulator is operating on the executable code 172 it may generate information that may be used by the register pressure tool 102 to generate register pressure results 184, such as are described in detail with reference to FIG. 4B and FIG. 5B. While the executed simulation results 182 and the register pressure results 184 may represent data structures of a different computer system 100, they may be formatted for use on the same type of computer system 100 that processed the object code 168.

FIG. 2 illustrates data structures and functions used by the register pressure tool 102 that may be stored in the memory 106. The memory 106 may include the following:

a register pressure tool 102 that determines the maximum number of live registers 411 (as shown in FIG. 1A) used during the execution of a computer program;

an entry cell variable 437 that is used in the present embodiment to represent a particular event 430 and the information related to the event 430;

an event 430 that typically operates by accessing registers 411 and executing instructions 208;

an uncertainty level variable 432, that includes information about the number, or quantity, of registers 411 about which information remains unknown;

a registers_with_known_information variable 434, which represents the registers 411 about which information is known regarding whether the range 202 is live or dead;

a number_of_live_registers variable 436, which is a value that represents the number, or quantity, of registers 202 that are live;

a time interval variable 438 that corresponds to the time of an event 430;

a partition variable 502 that identifies sub-sets of the information included in the entry cell 437 and that may reflect specific ranges of time, or specific ranges of events, or a particular section of the code, such as an identified procedure;

source code 160 that is generated from a computer system 100 (as shown in FIG. 1A) and that is typically written in a high-level programming language such as "C;"

intermediate code 164 that is a list of intermediate-level language instructions 208;

object code 168 that includes optimization changes which may be dependent on the particular multi-purpose computer system 100 on which the compilation system 108 (as shown in FIG. 1A) operates;

executable code 172 that is capable of executing on a multi-purpose computer system 100;

executed simulation results 182 that are generated by the simulator 180 (as shown in FIG. 1A);

register pressure results 184 that the register pressure tool 102 generates and that enable management of the register 411 allocation;

instructions 208 that are operating directives of the computer system 100, and that may be manipulated by registers 411, typically instructions 208 may be write instructions 208 or read instructions 208;

variables 209 that are identifiers for values and that may provide storage for values;

a range 202 that includes instructions 208 in which a value is included, and the range 202 is live with respect to the value if the value is live within the range 202, and the range 202 may be associated with a live register 411 that is accessed by the value;

a global maximum value 204 that represents the maximum number_of_live_registers 436 during the execution of the program;

a local maximum value 206 that represents the maximum number_of_live_registers 436, with respect to a partition 502, during the execution of the program;

as well as other data structures and functions.

It will be appreciated by those skilled in the art that events 430 may include a read instruction 208 and a write instruction 208 that access computer registers 411. That is, an event 430 includes register 411 operations such as a load operation that reads information from a register 411 or a store operation that writes information to a register 411. A code range 202 may be live or dead as a function of the type of instruction event 430 accessing a register 411.

FIG. 3 is a block diagram that illustrates scenarios in which a range 202 (as shown in FIG. 2) may be considered live or dead. Typically, a range 202 that is terminated by a write instruction 208 (as shown in FIG. 2) is a dead range 202, as shown in elements 302, 304, 306, 308, and 316. Conversely, a range 202 that is initiated by a write instruction 208 and terminated by a read instruction 208 is a live range 202, as shown in elements 312 and 314.

When a range 202 is initiated and terminated by a read instruction 208 as shown in element 318, the register pressure tool 102 inserts an additional initiating write instruction 208 before the terminating read instruction 208 for the purpose of defining a typical scenario, as shown in element 320. That is, the new scenario is an initiating write instruction 208 and a terminating read instruction 208 which is a live range 202, as shown in element 320.

More particularly, Table 1 below illustrates a live range 202 wherein the instruction 208 labeled "1" is "x=100," and the instruction 208 labeled "2" is "y=20," and they are assigned to registers 411 (as shown in FIG. 1A). Since "x" and "y" are both read from a register 411 in the instruction 208 labeled "4," "x" and "y" therefore are live during the code range 202. Therefore the registers that "y" and "y" have accessed are both live registers and the "x" and "y" registers 411 may not be re-used during this code range 202.

Alternatively, the instruction 208 labeled "3" is "w=50," and is a write instruction 208 of "w." The instruction 208 labeled "6" is "w=100," and is another write instruction 208 of "w." Therefore, the register 411 accessed by "w" is considered dead between the instruction 208 labeled "3" and the instruction 208 labeled "6."

                             TABLE 1
                            Live Range
          instr 1: x = 100;      .vertline. current live range of x
          instr 2: y = 20;       .vertline. current live range of x and y
          instr 3: w = 50;       .vertline. first write of w
          instr 4: z = x - y;    .vertline. current live range of x and y
          instr 5: x = 200;      .vertline. new live range of x begins
          instr 6: w = 100;      .vertline. second write of w

                             TABLE 2
                     Touched Register Matrix
        Register Number:      1       2       3       4      5
        Touched Value:      "1"     "0"     "1"     "1"    "0"

                                   TABLE 3
                     Entry Cells for Scenario of FIG. 4A
                                       UNCERTAINTY LEVEL
      Row     Event       4         3          2           1           0
       1        1     .sub.2 0; T_A
       2        1               .sub.2 0; T_A
       3        2     .sub.0 0; T_B
       4        2               .sub.2,0 0;T_A
       5        2               .sub.0 0;T_B .sub.2,0 0; T_A
       6        3     .sub.2 1; T_C
       7        3               .sub.0,2 1; T_B .sub.0,2 0;T_A
       8        3               .sub.2 1; T_C .sub.0,2 1; T_B
       9        4     .sub.0 1; T_D
      10        4               .sub.0,2 2; T_C .sub.0,2 1; T_B
      11        4               .sub.0 1; T_D .sub.0,2 2; T_C
      12        5     .sub.3 0; T_E
      13        5               .sub.0,3 1; T_D .sub.0,2,3 2; T_C
      14        5               .sub.3 0; T_E .sub.0,3 1; T_D .sub.0,2,3 2; T_C
      15        6     .sub.1 0; T_F
      16        6               .sub.1,3 0; T_E .sub.0,1,3 1; T_D .sub.0,1,2,3
     2; T_C
      17        6               .sub.1 0; T_F .sub.1,3 0; T_E .sub.0,1,3 1; T_D
     .sub.0,1,2,3 2; T_C
      18        7     .sub.0 0; T_G
      19        7               .sub.0,1 0; T_F .sub.0,1,3 0; T_E .sub.0,1,3 1;
     T_D
      20        7               .sub.0 0; T_G .sub.0,1 0; T_F .sub.0,1,3 1; T_D
     .sub.0,1,2,3 2; T_C
      21        8     .sub.3 1; T_H
      22        8               .sub.0,3 1; T_G .sub.0,1,3 1; T_F .sub.0,1,3 1;
     T_D .sub.0,1,2,3 2; T_C
      23        8               .sub.3 1; T_H .sub.0,3 1; T_G .sub.0,1,3 1; T_F
     .sub.0,1,2,3 2; T_C
      24        9     .sub.0 1; T_I
      25        9               .sub.0,3 2; T_H .sub.0,3 1; T_G .sub.0,1,3 1;
     T_F .sub.0,1,2,3 2; T_C
      26        9               .sub.0 1; T_I .sub.0,3 2; T_H .sub.0,1,3 1; T_F
     .sub.0,1,2,3 2; T_C
      27       10     .sub.1 1; T_J
      28       10               .sub.0,1 2; T_I .sub.0,1,3 3; T_H .sub.0,1,3 1;
     T_F .sub.0,1,2,3 2; T_C
      29       10               .sub.1 1; T_J .sub.0,1 2; T_I .sub.0,1,3 3; T_F
     .sub.0,1,2,3 2; T_C
      30       11     .sub.1 1; T_K
      31       11               .sub.1 1; T_J .sub.0,1 2; T_H .sub.0,1,3 3; T_H
     .sub.0,1,2,3 2; T_C
      32       11               .sub.1 1; T_K .sub.0,1 2; T_H .sub.0,1,3 3; T_H
     .sub.0,1,2,3 2; T_C
      33       12     .sub.0 0; T_L
             (Reg_0)
      34       12               .sub.0,1 1; T_K .sub.0,1 2; T_H .sub.0,1,3 3;
     T_H .sub.0,1,2,3 2; T_C
             (Reg_0)
      35       12               .sub.0 0; T_L .sub.0,1 2; T_H .sub.0,1,3 3; T_H
     .sub.0,1,2,3 2; T_C
             (Reg_0)
      36       12     .sub.1 0; T_L
             (Reg_1)
      37       12               .sub.0,1 0; T_L .sub.0,1 2; T_H .sub.0,1,3 3;
     T_H .sub.0,1,2,3 2; T_C
             (Reg_1)
      38       12               .sub.0 0; T_L .sub.0,1 2; T_H .sub.0,1,3 3; T_H
     .sub.0,1,2,3 2; T_C
             (Reg_1)
      39       12     .sub.2 0; T_L
             (Reg_2)
      40       12               .sub.0,2 0; T_L .sub.0,1,2 2; T_H .sub.0,1,2,3
     3; T_H .sub.0,1,2,3 2; T_C
             (Reg_2)
      41       12               .sub.2 0; T_L .sub.0,2 0; T_L .sub.0,1,2 2; T_H
     .sub.0,1,2,3 3; T_H
             (Reg_2)
      42       12     .sub.3 0; T_L
             (Reg_3)
      43       12               .sub.2,3 0; T_L .sub.0,2,3 0; T_L .sub.0,1,2,3
     2; T_H .sub.0,1,2,3 3; T_H
             (Reg_3)
      44       12               .sub.3 0; T_L .sub.2,3 0; T_L .sub.0,2,3 0; T_L
     .sub.0,1,2,3 3; T_H
             (Reg_3)

                                    TABLE 4
          Entry Cells for Scenario of FIG. 5A Including Partitioning
                                       UNCERTAINTY LEVEL
      ROW    EVENT      4         3          2            1             0
       1       1    .sub.2 0; T_A;
                       P_1
       2       1              .sub.2 0; T_A;
                                 P_1
       3       2    .sub.0 0; T_B;
                       P_1
       4       2              .sub.2,0 0; T_A;
                                 P_1
       5       2              .sub.0 0; T_B; .sub.2,0 0; T_A;
                                 P_A        P_1
       6       3    .sub.2 1; T_C;
                       P_1
       7       3              .sub.0,2 1; T_B; .sub.0,2 0; T_A;
                                 P_1        P_1
       8       3              .sub.2 1; T_C; .sub.0,2 1; T_B;
                                 P_1        P_1
       9       4    .sub.0 1; T_D;
                       P_1
      10       4              .sub.0,2 2; T_C; .sub.0,2 1; T_B;
                                 P_1        P_1
      11       4              .sub.0 1; T_D; .sub.0,2 2; T_; C;
                                 P_1        P_1
      12       5    .sub.3 0; T_E;
                       P_2
      13       5              .sub.0,3 1; T_D; .sub.0,2,3 2; T_C;
                                 P_1        P_1
      14       5              .sub.3 0; T_E; .sub.0,3 1; T_D; .sub.0,2,3 2;
     T_C;
                                 P_2        P_1          P_1
      15       6    .sub.1 0; T_F;
                       P_2
      16       6              .sub.1,3 0; T_E; .sub.0,1,3 1; T_D; .sub.0,1,2,3
     2; T_C;
                                 P_2        P_1          P_1
      17       6              .sub.1 0; T_F; .sub.1,3 0; T_E; .sub.0,1,3 1;
     T_D; .sub.0,1,2,3 2; T_C;
                                 P_2        P_2          P_1           P_1
      18       7    .sub.0 0; T_G;
                       P_2
      19       7              .sub.0,1 0; T_F; .sub.0,1,3 0; T_E; .sub.0,1,3 1;
     T_D; .sub.0,1,2,3 2; T_C;
                                 P_2        P_2          P_1           P_1
      20       7              .sub.0 0; T_G; .sub.0,1 0; T_F; .sub.0,1,3 1;
     T_D; .sub.0,1,2,3 2; T_C;
                                 P_2        P_2          P_1           P_1
                                                         --
                                                    .sub.0,1,3 0; T_E;
                                                         P_2
      21       8    .sub.2 1; T_H;
                       P_2
      22       8              .sub.0,2 1; T_G; .sub.0,1,2 1; T_F; .sub.0,1,2,3
     2; T_D; .sub.0,1,2,3 2; T_C;
                                 P_2        P_2          P_1           P_1
                                                         --
                                                    .sub.0,1,2,3 1; T_E;
                                                         P_2
      23       8              .sub.2 1; T_H; .sub.0,2 1; T_G; .sub.0,1,2 1;
     T_F; .sub.0,1,2,3 2; T_D;
                                 P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      24      9,    .sub.0 0; T_I;
             Reg_0     P_2
      25      9,              .sub.0,2 1; T_H; .sub.0,2 1; T_G; .sub.0,1,2 1;
     T_F; .sub.0,1,2,3 2; T_D;
             Reg_0               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      26      9,              .sub.0 0; T_I; .sub.0,2 1; T_H; .sub.0,1,2 1;
     T_F; .sub.0,1,2,3 2; T_D;
             Reg_0               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      27      9,    .sub.1 0; T_I;
             Reg_1     P_2
      28      9,              .sub.0,1 0; T_I; .sub.0,1,2 1; T_H; .sub.0,1,2 1;
     T_F; .sub.0,1,2,3 2; T_D;
             Reg_1               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      29      9,              .sub.1 0; T_I; .sub.0,1 0; T_I; .sub.0,1,2 1;
     T_H; .sub.0,1,2,3 2; T_D;
             Reg_1               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      30      9,    .sub.2 0; T_I;
             Reg_2     P_2
      31      9,              .sub.1,2 0; T_I; .sub.0,1,2 0; T_I; .sub.0,1,2 1;
     T_H; .sub.0,1,2,3 2; T_D;
             Reg_2               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      32      9,              .sub.2 0; T_I; .sub.1,2 0; T_I; .sub.0,1,2 1;
     T_H; .sub.0,1,2,3 2; T_D;
             Reg_2               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      33      9,    .sub.3 0; T_I;
             Reg_3     P_2
      34      9,              .sub.2,3 0; T_I; .sub.1,2,3 0; T_I; .sub.0,1,2,3
     1; T_H; .sub.0,1,2,3 2; T_D;
             Reg_3               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_E;
                                                                       P_2
      35      9,              .sub.3 0; T_I; .sub.2,3 0; T_I; .sub.1,2,3 0;
     T_I; .sub.0,1,2,3 2; T_D;
             Reg_3               P_2        P_2          P_2           P_1
                                                                       --
                                                                  .sub.0,1,2,3
     1; T_H;
                                                                       P_2

• Inventors
  Kunz, Robert C.; Dahl, Peter J.;
• Assignee
  Hewlett-Packard Development Company, L.P. (Houston, TX)
• Published
  Aug-19-2003
• Current US Classes:
  717/161
• Application #
  986882
• International Classes
  G06F 009/45
• Field of Search
  717/161 717/158 717/153 712/214 712/217 712/241 712/244
• Examiner
  Ingberg; Todd
• US Patent References:
  4656582
  5249295
  5261062
  5367651
  5367684
  5530866
  5537620
  5557761
  5713039
  5946491
  5987259
  6090156
  6128775
  6178499
  6286135
  6314511
  6317876
  6487715