| 5721883 |
System and method for implementing parallel image processing |
| Feb-24-1998 |
A system for performing parallel processing of images. The image data to be processed is supplied to multiple arithmetic processors by a data supply control unit. Each of the processors operates on a portion... |
| 5721854 |
Method and apparatus for dynamic conversion of computer instructions |
| Feb-24-1998 |
An instruction cache design which converts a sequential instruction stream into a compound format in the instruction cache. The conversion from sequential instructions to compound instructions is performed... |
| 5717883 |
Method and apparatus for parallel execution of computer programs using information providing for reconstruction of a logical sequential program |
| Feb-10-1998 |
A computer system with multiple execution units operates by treating a logical program as a tree structure with segments which include several computer instructions. Segments of the tree structure are... |
| 5712996 |
Process for dividing instructions of a computer program into instruction groups for parallel processing |
| Jan-27-1998 |
In order to be able to execute rapid processing of a program on super-scalar microprocessors, the individual instructions of this program must be divided into instruction groups, which can be processed... |
| 5687375 |
Debugging of High Performance Fortran programs with backup breakpoints |
| Nov-11-1997 |
This invention is a debugger for HPF-like languages which can be implemented on top of basically any debugger. A primary feature of the debugger is the use of backup breakpoints to generate a program status... |
| 5671431 |
Method for processing user program on a parallel computer system by inserting a tag during compiling |
| Sep-23-1997 |
In the execution of an application program on different computers of a parallel-computer system, the problem is encountered that a process running on the one computer requires a data item which is generated... |
| 5669001 |
Object code compatible representation of very long instruction word programs |
| Sep-16-1997 |
Object code compatibility is provided among VLIW processors with different organizations. The object code can be executed by sequential processors, thus providing backward compatibility with scalar and... |
| 5598561 |
Optimizing compiler which generates multiple instruction streams to be executed in parallel |
| Jan-28-1997 |
In a compiler which produces an object program from a source program, the automatic parallelization unit is comprised of the parallelizing intermediate code detection unit which detects an intermediate... |
| 5596732 |
Method of optimizing instruction sequence of compiler |
| Jan-21-1997 |
An overhead on a pipeline computer of an instruction sequence including branch instructions is reduced. In the case where an instruction sequence of a source program is converted by a compiler into an... |
| 5561802 |
Method for managing programs with attribute information and developing loaded programs |
| Oct-1-1996 |
Attribute information of programs developed by processors in a distributed processing system include I/O data for defining I/O operation of the programs, which is given in a program description form. A... |
| 5561801 |
System and method for multilevel promotion |
| Oct-1-1996 |
A compiler for compiling a computer program wherein the computer program is adapted for use with a data parallel computer. The compiler comprises a front end which generates a parse tree from a source... |
| 5535393 |
System for parallel processing that compiles a filed sequence of instructions within an iteration space |
| Jul-9-1996 |
An improved parallel processing apparatus and method executes an iterative sequence of instructions by arranging the sequence into subtasks and allocating those subtasks to processors. This division and... |
| 5524242 |
System and method for determining the number of parallel processes to be created according to run cost value and parallelization overhead |
| Jun-4-1996 |
The system for executing processes in parallel in a multiprocessor system having plural instruction processors performs parallel processing by converting a source program written in a high-level language... |
| 5515535 |
System and method for parallel variable optimization |
| May-7-1996 |
An optimizer for optimizing an intermediate representation (IR) tree having multiple nodes. The IR tree represents a partial compilation of a source code. The source code is written using a high level... |
| 5485612 |
Method and apparatus for assigning processors in parallel computer system |
| Jan-16-1996 |
A computer system has a plurality of processors, each having a local memory. An expression is represented by operands and operations and is expressed in a form of a tree. The operands are assigned to leaf... |
| 5452461 |
Program parallelizing apparatus capable of optimizing processing time |
| Sep-19-1995 |
A program parallelizing apparatus for generating from a source program to be executed an object program which is capable of being processed in parallel by a plurality of processors constituting a multi-processor... |
| 5442797 |
Latency tolerant risc-based multiple processor with event driven locality managers resulting from variable tagging |
| Aug-15-1995 |
A method and an apparatus for reconciling communication and locality by enabling a user/programmer to write programs in an extended procedural language which explicitly manipulate locality. The multiprocessor... |
| 5437037 |
Simulation using compiled function description language |
| Jul-25-1995 |
A simulation program conversion method and system is provided. The original simulation program is written by a function description language, such as Verilog-HDL, using a text editor, and, then, the original... |
| 5437035 |
Method and apparatus for compiling a program incending a do-statement |
| Jul-25-1995 |
A method and apparatus for analyzing a DO-statement to determine the type of a DO-variable and for determining whether a sign of an incrementation parameter at the time of compile can be determined are... |
| 5410696 |
Method of processing a program by parallel processing, and a processing unit thereof |
| Apr-25-1995 |
In order to process a program by parallel processing using a plurality of processors, the program is divided into a plurality of partial programs. Then one or more expressions are derived, the or each... |
| 5404469 |
Multi-threaded microprocessor architecture utilizing static interleaving |
| Apr-4-1995 |
A static interleaving technique solves the problem of resource contention in a very long instruction word multi-threaded microprocessor architecture. In the static interleaving technique, each function... |
| 5381550 |
System and method for compiling a source code supporting data parallel variables |
| Jan-10-1995 |
A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel... |
| 5381534 |
System for automatically generating efficient application - customized client/server operating environment for heterogeneous network computers and operating systems |
| Jan-10-1995 |
A high level virtual computer in a heterogeneous hardware and software environment. A user specifies the hardware and software configuration of a virtual computer employing multiple coarse grain single... |
| 5367687 |
Method and apparatus for optimizing cost-based heuristic instruction scheduling |
| Nov-22-1994 |
A method and apparatus for optimizing cost-based heuristic instruction scheduling for a pipelined processor is disclosed which has particular application to compile time instruction scheduling after code... |
| 5367651 |
Integrated register allocation, instruction scheduling, instruction reduction and loop unrolling |
| Nov-22-1994 |
An improved register allocator, an improved instruction scheduler, an instruction combiner, and an improved loop unroller is provided to the code generator of a compiler of a computer system. Both the... |
| 5355494 |
Compiler for performing incremental live variable analysis for data-parallel programs |
| Oct-11-1994 |
A compiler for compiling a computer program wherein the computer program is adapted for use with a data parallel computer. The compiler comprises an optimizer which optimizes the compiled code. In optimizing... |
| 5355492 |
System for compiling parallel communications instructions including their embedded data transfer information |
| Oct-11-1994 |
The present invention is directed towards a compiler for processing parallel communication instructions on a data parallel computer. The compiler of the present invention comprises a front end, a middle... |
| 5333280 |
Parallel pipelined instruction processing system for very long instruction word |
| Jul-26-1994 |
A parallel pipelined instruction processing system for executing a plurality of instructions in parallel without no branch delay, comprises a instruction block fetch unit for fetching an instruction block... |
| 5278986 |
System and method for compiling a source code supporting data parallel variables |
| Jan-11-1994 |
A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel... |
| 5274818 |
System and method for compiling a fine-grained array based source program onto a course-grained hardware |
| Dec-28-1993 |
The present invention provides a parallel vector machine model for building a compiler that exploits three different levels of parallelism found in a variety of parallel processing machines, and in particular,... |
| 5261095 |
Partitioning software in a multiprocessor system |
| Nov-9-1993 |
A method of partitioning a software program, so that a main program may be executed on a first processor, and at least one designated function may be executed on a second processor. The subprogram to be... |
| 5255385 |
Method of testing program, and compiler and program testing tool for the method |
| Oct-19-1993 |
A method of testing a source program includes the steps of converting the source program into a load module while dividing statements of the source program associated with access to same data into a plurality... |
| 5125092 |
Method and apparatus for providing multiple condition code fields to to allow pipelined instructions contention free access to separate condition codes |
| Jun-23-1992 |
A computer system includes a condition register having multiple fields. Each field may be used as an independent condition register. A compiler which generates executable code for the computer system assigns... |
| 5121498 |
Translator for translating source code for selective unrolling of loops in the source code |
| Jun-9-1992 |
A translator translates user source code into user object code such as machine code. The translator responds differently to two unique types of loops in the source code. In particular, the translator responds... |
| 5095432 |
Data processing system implemented process and compiling technique for performing context-free parsing algorithm based on register vector grammar |
| Mar-10-1992 |
A context-free parsing algorithm employing register vector grammars provides fast parsing of natural languages. A compiler for register vector grammars accepts input grammars as standard phase structure... |
| 5021945 |
Parallel processor system for processing natural concurrencies and method therefor |
| Jun-4-1991 |
A computer processing system containing a plurality of identical processor elements each of which does not retain execution state information from prior operations. The plurality of identical processor... |
| 4951192 |
Device for managing software configurations in parallel in a network |
| Aug-21-1990 |
A software configuration management system that uses a network computing environment to build large software systems in parallel. A configuration manager assigns the compilation of buildable components... |
| 4885684 |
Method for compiling a master task definition data set for defining the logical data flow of a distributed processing network |
| Dec-5-1989 |
A compiler method is disclosed which defines a data flow for a specific complex function to be executed on a plurality of data processing elements in a distributed processing system, by means of defining... |
| 4853872 |
Program execution method in a system having plural computers |
| Aug-1-1989 |
In a system wherein a plurality of processors have instruction sets which are different at least in part from one another, it is possible for any processor to generate the object program. This is accomplished... |
| 4734848 |
Combination reduction processing method and apparatus |
| Mar-29-1988 |
A calculation processing system characterized by decomposing a program into tuples, functions and variables, including abstracting the decomposed program thereby to transform it into a combinator graph,... |
| 4583164 |
Syntactically self-structuring cellular computer |
| Apr-15-1986 |
A design is disclosed for a cellular computer consisting of many processors, of two kinds, connected in the form of a tree. The computer is intended for the highly parallel execution of programs written... |
| 4574348 |
High speed digital signal processor architecture |
| Mar-4-1986 |
A data processor uses complex instructions and a sequence controller to cause first and second fields of such instructions to process data, respectively, by first and second ALUs, with a third field of... |
| 4484272 |
Digital computer for executing multiple instruction sets in a simultaneous-interleaved fashion |
| Nov-20-1984 |
A digital computer executes a first instruction set in an interleaved fashion with second and third instruction sets, the latter two of which are executed at the same time. The first, second, and third... |
