| 7039906 |
Compiler for enabling multiple signed independent data elements per register |
| May-2-2006 |
A compiler for data processing outputs lower-level code for packing multiple signed data elements per register into a processor's registers using the rules set forth herein, and when executed, the code... |
| 7039905 |
Compiler device and computer-readable recording medium recorded with compiler program |
| May-2-2006 |
A compiler device and a computer-readable recording medium recorded with a compiler program, adapted to generate a code for performing a procedure call in a program, making use of a dynamically and thread-piece-wise... |
| 7036114 |
Method and apparatus for cycle-based computation |
| Apr-25-2006 |
A computer system for cycle-based computation includes a processor array, a translation component adapted to translate a cycle-based design, a host computer operatively connected to the processor array... |
| 7024667 |
Parallel efficiency calculating method and apparatus |
| Apr-4-2006 |
The present invention is to clarify causes of hampering the performance by quantitatively associating a value of a parallel efficiency with factors of hampering the improvement of the performance of a... |
| 7010787 |
Branch instruction conversion to multi-threaded parallel instructions |
| Mar-7-2006 |
The invention provides a program conversion apparatus which performs parallelization for a multi-thread microprocessor on an intermediate program level. A parallelization apparatus of the program conversion... |
| 7007267 |
Transparent shared memory access in a software development system |
| Feb-28-2006 |
The invention relates to a method for transparently writing to shared memory when debugging a multiple processor system. In this method, a software memory map reflecting the memory usage of the processors... |
| 7000051 |
Apparatus and method for virtualizing interrupts in a logically partitioned computer system |
| Feb-14-2006 |
A resource and partition manager virtualizes interrupts without using any additional hardware in a way that does not disturb the interrupt processing model of operating systems running on a logical partition.... |
| 6990657 |
Shared software breakpoints in a shared memory system |
| Jan-24-2006 |
The invention relates to a method for maintaining coherency of software breakpoints in shared memory when debugging a multiple processor system. Using this method, at least two debug sessions associated... |
| 6976249 |
Method for embedding object codes in source codes |
| Dec-13-2005 |
Methods for embedding codes executable in a first system having a first microprocessor into codes executable in a second system having a second microprocessor are described herein. In one aspect of the... |
| 6959372 |
Processor cluster architecture and associated parallel processing methods |
| Oct-25-2005 |
A parallel processing architecture comprising a cluster of embedded processors that share a common code distribution bus. Pages or blocks of code are concurrently loaded into respective program memories... |
| 6948167 |
Data exchange method in a multi-processor system |
| Sep-20-2005 |
In the data exchange method in a multiprocessor system which has a primary processor and at least one secondary processor which communicate with one another via a system bus, with data being able to be... |
| 6944853 |
Predicated execution of instructions in processors |
| Sep-13-2005 |
A processor includes a series of predicate registers 135. Each predicate register is switchable between at least respective first and second states and each is assignable to one or more predicated-execution... |
| 6925634 |
Method for maintaining cache coherency in software in a shared memory system |
| Aug-2-2005 |
The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage... |
| 6904325 |
Method for optimizing ECU parallel flash programming arrangement on a CAN-based vehicle serial bus in general assembly |
| Jun-7-2005 |
A parallel flash programming system for use in motor vehicle assembly includes an input receptive of information relating to a predetermined number of processors connected to a system bus, processor flash... |
| 6823283 |
Measurement system including a programmable hardware element and measurement modules that convey interface information |
| Nov-23-2004 |
System and method for measurement, DAQ, and control operations. A measurement module includes measurement circuitry for performing signal conditioning and/or signal conversion, and interface circuitry... |
| 6820257 |
Optimized production of hardware from source programs involving multiplications |
| Nov-16-2004 |
A method of compiling a source program to produce hardware is provided. The method includes the steps of carrying out data flow analysis of the source program to produce a data flow representation of the... |
| 6792599 |
Method and apparatus for an atomic operation in a parallel computing environment |
| Sep-14-2004 |
A method and apparatus for a atomic operation is described. A method comprises receiving a first program unit in a parallel computing environment, the first program unit including a memory update operation... |
| 6785892 |
Communications between partitioned host processors and management processor |
| Aug-31-2004 |
An inventive protocol for communicating between a management processor and host processors allows for the cooperative management of resources among host processors within a partition and also among a set... |
| 6754892 |
Instruction packing for an advanced microprocessor |
| Jun-22-2004 |
A process for packing an instruction word including providing a word value representing an instruction word into which an operation is to be fit be equal to some initial value having a plurality of portions... |
| 6751569 |
System and method for receiving information from a test apparatus |
| Jun-15-2004 |
A system that includes a computer system configured to boot using a system firmware is provided. The system firmware includes instructions for causing the computer system to provide a control code to a... |
| 6748589 |
Method for increasing the speed of speculative execution |
| Jun-8-2004 |
A method for increasing the speed of execution by a processor including the steps of selecting a sequence of instructions to optimize, optimizing the sequence of instructions, creating a duplicate of instructions... |
| 6742110 |
Preventing the execution of a set of instructions in parallel based on an indication that the instructions were erroneously pre-coded for parallel execution |
| May-25-2004 |
A processing engine 10 for executing instructions in parallel comprises an instruction buffer 600 for holding at least two instructions, with the first instruction 602 in a first position and the second... |
| 6732354 |
Method, system and software for programming reconfigurable hardware |
| May-4-2004 |
The method, system and tangible medium storing computer readable software of the present invention, provide for program constructs, such as commands, declarations, variables, and statements, which have... |
| 6725448 |
System to optimally create parallel processes and recording medium |
| Apr-20-2004 |
An optimizing system, method and computer readable recording medium to increase the speed of parallel processing by allowing a mixture of automatic creation of parallel processes and OpenMP API processing... |
| 6718541 |
Register economy heuristic for a cycle driven multiple issue instruction scheduler |
| Apr-6-2004 |
A method for scheduling operations utilized by an optimizing compiler to reduce register pressure on a target hardware platform assigns register economy priority (REP) values to each operation in a basic... |
| 6711670 |
System and method for detecting data hazards within an instruction group of a compiled computer program |
| Mar-23-2004 |
A superscalar processing system that detects data hazards within instruction groups utilizes a memory, a plurality of pipelines, an instruction dispersal unit (IDU), and a control mechanism. The memory... |
| 6681388 |
Method and compiler for rearranging array data into sub-arrays of consecutively-addressed elements for distribution processing |
| Jan-20-2004 |
In a data rearranging method for performing a distribution processing of an array in a multi processor system including a plurality of processors each of which has an independent memory, there are included... |
| 6658660 |
System and method of automatically modifying source code for marshaling, unmarshaling and marking modified data objects |
| Dec-2-2003 |
A computer (100) and a method (200) are provided for automatically generating source code (132) readily operable in a fault-tolerant system or a distributed system, from source code (130) non-operable... |
| 6651246 |
Loop allocation for optimizing compilers |
| Nov-18-2003 |
Loop allocation for optimizing compilers includes the generation of a program dependence graph for a source code segment. Control dependence graph representations of the nested loops, from innermost to... |
| 6622301 |
Parallel program generating method |
| Sep-16-2003 |
When converting a sequential execution source program into a parallel program to be executed by respective processors (nodes) of a distributed shared memory parallel computer, a compiler computer transforms... |
| 6609248 |
Cross module representation of heterogeneous programs |
| Aug-19-2003 |
An output translator provides for cross module representations of components within a heterogeneous program by translating modifying a platform-neutral intermediate representation (IR) of the program into... |
| 6598222 |
Programming method for concurrent programs and program supporting apparatus thereof |
| Jul-22-2003 |
An apparatus for supporting parallelization according to the invention is characterized by comprising a serialization unit for converting a first concurrent program having a concurrent structure into a... |
| 6588009 |
Method and apparatus for compiling source code using symbolic execution |
| Jul-1-2003 |
A method and apparatus for optimizing the compilation of a computer program by exposing parallelism are disclosed. Information describing the operations in the program and their sequence is extracted and... |
| 6588008 |
Assembler tool for processor-coprocessor computer systems |
| Jul-1-2003 |
A central processor-coprocessor assembly comprising an assembler software tool for extending the base central processor tasks into at least one coprocessor. What is important is that the assembler software... |
| 6578195 |
Process for data encapsulation in large scale legacy software |
| Jun-10-2003 |
A method for data encapsulation in large scale legacy software code comprising the steps of: (a) generating a symbol table output from the legacy software code; (b) automatically scanning the symbol table... |
| 6564372 |
Critical path optimization-unzipping |
| May-13-2003 |
A method and apparatus for optimizing scheduling of a block of program instructions to remove a condition resolving instruction from the critical path where the resolution of a condition controls the selection... |
| 6560775 |
Branch preparation |
| May-6-2003 |
A method and system for preparing branch instruction of a computer program, for compiling and execution in a computer system, in which each transfer instruction is split into two instructions: a control... |
| 6550059 |
Method for generating optimized vector instructions from high level programming languages |
| Apr-15-2003 |
A method for compiling source code to produce vector instructions, wherein parallel operands are placed in adjacent locations in memory and wherein the realignment of the operands is minimized. One embodiment... |
| 6502238 |
System for constructing and distributing block-based fragments |
| Dec-31-2002 |
A distributed block-based programming model for control applications such as multimedia based real-time applications is described. According to one aspect of the invention, user program specifies interconnections... |
| 6487577 |
Distributed compiling |
| Nov-26-2002 |
A method and apparatus for distributing compiling jobs among a number of sub-contractor computers in a network is described. The method involves publishing job-shops, which are computer capability descriptions... |
| 6463580 |
Parallel processing utilizing highly correlated data values |
| Oct-8-2002 |
A speculative execution method decreases execution time. A key value and a correlated value are stored as a correlated data values pair. Upon matching a current value to the key value, the correlated value... |
| 6457173 |
Automatic design of VLIW instruction formats |
| Sep-24-2002 |
A computer-implemented method automates the design of efficient binary instruction encodings of VLIW instruction formats. The method automatically finds compact instruction formats that can express and... |
| 6438746 |
DCE functional dimensioning |
| Aug-20-2002 |
A compiler is provided for a distributed object system in which functional requirements on system performance criteria can be entered as comment fields in an object-oriented language (e.g., C++) which... |
| 6339840 |
Apparatus and method for parallelizing legacy computer code |
| Jan-15-2002 |
A computer-implemented method and apparatus for parallelizing input computer-program code based on class-specific abstractions. The method includes the steps of providing a class-specific abstraction (CSA),... |
| 6292939 |
Method of reducing unnecessary barrier instructions |
| Sep-18-2001 |
Unnecessary barrier instructions are dynamically reduced in a parallel processing object program, program module or object code section to be parallel processed in a multiprocessor system by a compiler... |
| 6275980 |
Programming method for concurrent programs and program supporting apparatus thereof |
| Aug-14-2001 |
An apparatus for supporting parallelization according to the invention is characterized by comprising a serialization unit for converting a first concurrent program having a concurrent structure into a... |
| 6275921 |
Data processing device to compress and decompress VLIW instructions by selectively storing non-branch NOP instructions |
| Aug-14-2001 |
A data processing device includes an instruction storage memory which stores load instructions by eliminating NOP instructions for insertion into a load module of a VLIW computer. The data processing device... |
| 6256779 |
Distributed processing |
| Jul-3-2001 |
An object present on a first computer is replicated on a second computer. The object includes pointers to program code within the memory space of the first computer. Data elements of said object are stored... |
| 6253372 |
Determining a communication schedule between processors |
| Jun-26-2001 |
To generate an optimum communication schedule when data is transmitted or received between processors which constitute a parallel computer or a distributed multiprocessor system. Processors which each... |
| 6243863 |
Apparatus and method for parallelizing legacy computer code |
| Jun-5-2001 |
A computer-implemented method and apparatus for parallelizing input computer-program code based on class-specific abstractions. The method includes the steps of providing a class-specific abstraction (CSA),... |
