| 6430676 |
Method and system for calculating instruction lookahead |
| Aug-6-2002 |
A computer-based method and system for determining designations for conditional branch operations and settings for lookahead values for a portion of a computer program. The lookahead system of the present... |
| 6425124 |
Resource allocation device for reducing the size and run time of a machine language program |
| Jul-23-2002 |
The present invention discloses a resource allocation device comprising a pattern generation unit for generating every pattern of a live variable placing within a program portion subjected to resource... |
| 6415433 |
Method and system for identifying locations to move portions of the computer program |
| Jul-2-2002 |
A method system for optimizing a computer program. In one embodiment, the system identifies depths of blocks of a computer program and identifies the availability of expressions of the computer program.... |
| 6412108 |
Method and apparatus for speeding up java methods prior to a first execution |
| Jun-25-2002 |
A method and apparatus for optimizing performance of a method. A method is loaded and verified in a virtual machine. Prior to execution of the method, elements of the method are analyzed for optimization... |
| 6412107 |
Method and system of providing dynamic optimization information in a code interpretive runtime environment |
| Jun-25-2002 |
The present invention is a code preparation system (12) which accepts input code (11) in intermediate code format, our source code format which is first translated into intermediate format, analyzes the... |
| 6412105 |
Computer method and apparatus for compilation of multi-way decisions |
| Jun-25-2002 |
Computer method of compiling a multi-way decision statement for VLIW processing is described. The method comprises: (a) generating profile data for a multi-way decision statement, such a s a switch statement;... |
| 6397380 |
Computer-program compilers comprising a program augmentation capability |
| May-28-2002 |
A method for optimizing and transforming a compiler program in a computer system. The method comprises the steps of constructing a compiler comprising a program augmentation capability; and, locating this... |
| 6389587 |
User interface for developing and executing data flow programs and methods, apparatus, and articles of manufacture for optimizing the execution of data flow programs |
| May-14-2002 |
Methods, systems, and articles of manufacture consistent with the present invention provides a development tool that enables computer programmers to design and develop a data flow program for execution... |
| 6381740 |
Method and system for incrementally improving a program layout |
| Apr-30-2002 |
A method and system for incrementally improving the layout of a program image of a computer program to reduce the working set. The system iteratively selects pairs of basic blocks and reorders the basic... |
| 6374403 |
Programmatic method for reducing cost of control in parallel processes |
| Apr-16-2002 |
A parallel compiler exploits temporal recursion to reduce the cost of control code generated in transforming a sequential nested loop program into a set of parallel processes mapped to an array of processors.... |
| 6357039 |
Automatic code generation |
| Mar-12-2002 |
A system for automatically generating native processor code includes a graphical designer and a compiler. The graphical designer allows a user to construct graphically a signal processing system, and the... |
| 6324688 |
Method and apparatus for optimizing execution of Java programs |
| Nov-27-2001 |
A method and apparatus for optimizing execution of Java programs. A fully caffienated class file is provided in which a standard Java class file, containing a directory and bytecodes, is enhanced to include... |
| 6317875 |
Application execution performance through disk block relocation |
| Nov-13-2001 |
Execution time performance of one or more applications that are dynamically loaded for execution post initial loading is improved by invoking selected parts of the one or more applications for execution... |
| 6317870 |
System and method for optimization of inter-module procedure calls |
| Nov-13-2001 |
A system and method are described for providing optimization for software inter-module procedure calls. The system provides for a program linker to translate a non-executable program into a computer program.... |
| 6314563 |
Expedited object locking and unlocking |
| Nov-6-2001 |
An object structure's header (40) allocates a two-bit synchronization-state field (42) solely to monitor data for implementing synchronization on that object. When the object is locked by a particular... |
| 6314562 |
Method and system for anticipatory optimization of computer programs |
| Nov-6-2001 |
A method and system for anticipatory optimization of computer programs. The system generates code for a program that is specified using programming-language-defined computational constructs and user-defined,... |
| 6314560 |
Method and apparatus for a translation system that aggressively optimizes and preserves full synchronous exception state |
| Nov-6-2001 |
A translating software emulator designed for converting code from a legacy system to a target system and fully preserving the synchronous exception state while still allowing for full and aggressive optimization... |
| 6301704 |
Method, system, and computer program product for using static single assignment form as a program representation and a medium for performing global scalar optimization |
| Oct-9-2001 |
A method, system, and computer product uses a hashed static single assignment (SSA) form as a program representation and a medium for performing global scalar optimization. A compiler, after expressing... |
| 6298477 |
Method and apparatus for selecting ways to compile at runtime |
| Oct-2-2001 |
Apparatus, methods, and computer program products are disclosed for determining how to compile a program at runtime. A bytecode instruction associated with the program that can be compiled in multiple... |
| 6292939 |
Method of reducing unnecessary barrier instructions |
| Sep-18-2001 |
Unnecessary barrier instructions are dynamically reduced in a parallel processing object program, program module or object code section to be parallel processed in a multiprocessor system by a compiler... |
| 6292938 |
Retargeting optimized code by matching tree patterns in directed acyclic graphs |
| Sep-18-2001 |
An optimizing, compiler that performs retargetable object code generation for a specific processor by matching tree patterns in directed acyclic graphs derived from the source code. |
| 6292935 |
Method for fast translation of java byte codes into efficient native processor code |
| Sep-18-2001 |
To efficient generate native processor code from operand stack based code, a mimic stack is introduced. The mimic stack is a compile time data structure that stores the location of operands pushed onto... |
| 6286135 |
Cost-sensitive SSA-based strength reduction algorithm for a machine with predication support and segmented addresses |
| Sep-4-2001 |
A compiler optimization algorithm that deals with aggressive strength reduction of integer machine instructions found in loops. The algorithm permits the strength reduction of such machine instructions... |
| 6282706 |
Cache optimization for programming loops |
| Aug-28-2001 |
A cache memory architecture 50, which may be, for example, a set associative cache memory, has a cache controller (52) with an internal register for storing the address of the active line currently latched... |
| 6279152 |
Apparatus and method for high-speed memory access |
| Aug-21-2001 |
When a processing unit of a vector computer detects an optimization directive line for optimizing a list accessing method during the compilation, an access method is automatically changed according to... |
| 6275984 |
System and method for delaying indirect register offset resolution |
| Aug-14-2001 |
A system and method for delaying indirect register offset resolution including a processor having a plurality of registers, a memory storing program instructions, and a compiler for translating the program... |
| 6263495 |
Method and apparatus for optimizing state transition table used for event-driven software |
| Jul-17-2001 |
A state transition history for each state and an event establishment history for each event are gathered and recorded while a parsing and program invoking portion parses a state transition table. A state... |
| 6263489 |
Method and apparatus for debugging of optimized code |
| Jul-17-2001 |
The invention is a method for debugging a machine code of a program that has been subjected to an optimizing action, wherein the machine code may have been reordered, duplicated, eliminated or transformed... |
| 6260189 |
Compiler-controlled dynamic instruction dispatch in pipelined processors |
| Jul-10-2001 |
The invention provides techniques for improving the performance of pipelined processors by eliminating unnecessary stalling of instructions. In an illustrative embodiment, a compiler is used to identify... |
| 6256782 |
Compile apparatus, compile method and computer-readable medium storing compiler |
| Jul-3-2001 |
A compile apparatus acquires at least one dedicated mask value-only register from registers with respect to a specific mask instruction, and allocates a variable and a constant to a register other than... |
| 6256777 |
Method and apparatus for debugging of optimized machine code, using hidden breakpoints |
| Jul-3-2001 |
A debugging method is described wherein a debug information file is constructed which includes information that identifies changes of variable value assignments to registers at plural steps of program.... |
| 6253309 |
Forcing regularity into a CISC instruction set by padding instructions |
| Jun-26-2001 |
A microprocessor configured to rapidly decode variable-length instructions is disclosed. The microprocessor is configured with a predecoder and an instruction cache. The predecoder is configured to expand... |
| 6249911 |
Optimizing compiler for generating store instructions having memory hierarchy control bits |
| Jun-19-2001 |
An optimizing compiler for generating STORE instructions having memory hierarchy control bits is disclosed. The compiler first converts a first STORE instruction to a second STORE instruction. The compiler... |
| 6249910 |
Apparatus and method for incrementally update static single assignment form for cloned variable name definitions |
| Jun-19-2001 |
An improved technique for incrementally updating a source code representation having cloned variable name definitions to static single assignment (SSA) form is described. The technique receives an intermediate... |
| 6249909 |
User configurable operating system |
| Jun-19-2001 |
An operating system preferably for use with a digital signal processing target is disclosed which minimizes time and space requirements on the target DSP chip. The operating system is also configured in... |
| 6240548 |
Method and apparatus for performing byte-code optimization during pauses |
| May-29-2001 |
Methods and apparatus for dynamically compiling byte codes associated with methods during idle periods in the execution of a computer program are disclosed. The described methods are particularly suitable... |
| 6233732 |
Compiling system using intermediate codes to store a plurality of values |
| May-15-2001 |
A compiling system includes a first unit for converting a source program into an intermediate text formed of intermediate codes, each of the intermediate codes having a portion used to explicitly indicate... |
| 6230261 |
Method and apparatus for predicting conditional branch instruction outcome based on branch condition test type |
| May-8-2001 |
An apparatus and method for improving the execution of conditional branch instructions is provided. A static branch predictor makes predictions about the outcomes of branch instructions based upon a combination... |
| 6223337 |
Random test generation for compiler optimization |
| Apr-24-2001 |
An optimized compiler is tested. Code segments are stored in a segment file. Each code segment includes a description of an external interface with other segments. A source function is built using the... |
| 6212630 |
Microprocessor for overlapping stack frame allocation with saving of subroutine data into stack area |
| Apr-3-2001 |
When a subroutine call instruction is transferred from the instruction memory 39 to the IDB 29 and decoded by the decoder 18, the following operations (1)-(3) are executed in parallel: (1) a return address... |
| 6202205 |
System and method for profile-based, on-the-fly optimization of library code |
| Mar-13-2001 |
A system and method for profiling the execution of a software library used by an application, creating an optimized library based on the profiling, and updating to the optimized library without halting... |
| 6202204 |
Comprehensive redundant load elimination for architectures supporting control and data speculation |
| Mar-13-2001 |
In one implementation of the invention, a computer implemented method used in compiling a program includes identifying a covering load, which may be one of a set of covering loads, and a redundant load.... |
| 6202203 |
Method of, system for, and computer program product for providing global value numbering |
| Mar-13-2001 |
A fast and efficient way of performing global value numbering beyond basic blocks and extended basic blocks on a complete topological ordering of basic blocks in a program. Global value numbering makes... |
| 6199201 |
Software constructs that facilitate partial evaluation of source code |
| Mar-6-2001 |
A partial evaluator, or pre-compiler, for a computer program enables a user to provide, at suitable places within a program, language constructs which cause certain expressions within the program to be... |
| 6195793 |
Method and computer program product for adaptive inlining in a computer system |
| Feb-27-2001 |
A method and computer program product are provided for implementing adaptive inlining in a computer system. Call sites in a call multigraph are identified for possible inlining. A first approximation of... |
| 6195743 |
Method and system for compressing reduced instruction set computer (RISC) executable code through instruction set expansion |
| Feb-27-2001 |
A compression scheme is disclosed for program executables that run on Reduced Instruction Set Computer (RISC) processors, such as the PowerPC architecture. The RISC instruction set is expanded by adding... |
| 6173443 |
Method of compiling a loop |
| Jan-9-2001 |
In a method of compiling, the contents of registers corresponding to data arrays having the same array names but having different indexes in sequence with the progress of a loop prior to loop return are... |
| 6161217 |
Accurate method for inlining virtual calls |
| Dec-12-2000 |
A computer system (10) is configured as a compiler to translate source code (FIG. 4) into object code (FIG. 6). The source code calls a polymorphic method on a receiver object. The compiler inlines the... |
| 6158046 |
Computer device and method for processing data utilizing pseudoinstruction words |
| Dec-5-2000 |
A computer device includes a processor for processing an object code containing a plurality of instruction words. It further includes a memory for storing a plurality of pseudoinstruction words respectively... |
| 6141793 |
Apparatus and method for increasing the performance of interpreted programs running on a server |
| Oct-31-2000 |
An apparatus and method provide the execution of interpreted languages, and more particularly increase the performance of interpreted languages execution in application software. The performance increase... |
