System and method for improving index performance through prefetching6772179Abstract The present invention provides a prefetch system for use with a cache memory associated with a database employing indices. In one embodiment, the prefetch system includes a search subsystem configured to prefetch cache lines containing an index of a node of a tree structure associated with the database. Additionally, the prefetch system also includes a scan subsystem configured to prefetch cache lines based on an index prefetch distance between first and second leaf nodes of the tree structure. Claims What is claimed is: Description TECHNICAL FIELD OF THE INVENTION
TABLE 1
Definition of Notations
Variable Definition
.omega. # of cache lines in an index node
m # of child pointers in a one-line-wide node
N # of (key; tupleID) pairs in an index
d # of child pointers in non-leaf node
(= .omega. .times. m)
T.sub.1 full latency of a cache miss
T.sub.next latency of an additional pipelined cache miss
B ##EQU1##
k # of nodes to prefetch ahead
c # of cache lines in jump-pointer array chunk
Before starting a binary search, all of the cache lines that comprise the node are prefetched. Since an index search is first performed to locate the position for an insertion, all of the nodes on the path from the root to the leaf are already in the cache before the real insertion phase. Therefore, the only additional cache misses are caused by newly allocated nodes, which are prefetched in their entirety before redistributing the keys. For deletions, a "lazy deletion" is performed. If more than one key is in the node, the key is simply deleted. It is only when the last key in a node is deleted that a redistribution of keys or deletion of the node is attempted. Since an index search is also performed prior to deletion, the entire root-to-leaf path is in the cache. Key redistribution is the only potential cause of additional cache misses. Therefore, when all keys in a node are deleted, the sibling node is prefetched from which keys may be redistributed. Prefetching may also be used to accelerate the bulkload of a B.sup.+ -Tree. However, because this is expected to occur infrequently, attention has been focused on the more frequent operations of search, insertion and deletion. In the illustrated embodiment, fixed-size keys, tupleIDs, and pointers are considered for simplicity. It is also assumed that tupleIDs and pointers are the same size. One skilled in the pertinent art will realize that these conditions are only exemplary and that other conditions are well within the broad scope of the present invention. As discussed earlier, search times are expected to improve through the scheme presented since it reduces the number of levels in the B.sup.+ -Tree without significantly increasing the cost of accessing each level. Updates always begin with a search phase. The expensive operations typically occur either when a node becomes too full upon an insertion and must be split, or when a node becomes empty upon a deletion and keys must be redistributed. Although node splits and key redistributions are more costly with larger nodes, the relative frequency of these expensive events may typically decrease. Therefore, update performance is expected to be comparable to, or perhaps even better than, B.sup.+ -Trees with single-line nodes. The space overhead of the index is reduced with wider nodes. This is primarily due to the reduction in the number of non-leaf nodes. For a full tree, each leaf node contains d-1 (key, tupleID) pairs. The number of non-leaf nodes is dominated by the number of nodes in the level immediately above the leaf nodes and therefore approximately equal to N/d(d-1). As the fanout d increases with wider nodes, the node size grows linearly but the number of non-leaf nodes decreases quadratically, resulting in a nearly linear decrease in the non-leaf space overhead. There are two system parameters that typically affect a determination of an optimal node size, given prefetching. The first system parameter is the extent to which the memory subsystem can overlap multiple cache misses. This may be quantified as the latency of a full cache miss T.sub.1 divided by the additional time until another pipelined cache miss T.sub.next would also complete. This ratio (i.e., T.sub.1 /T.sub.next) may be called the normalized bandwidth B. For example, in the Compaq ES40-based machine example, T.sub.1 =150 cycles, T.sub.next =10 cycles, and therefore the normalized bandwidth B=15. The larger a value of the normalized bandwidth B, the greater the ability of a system to overlap parallel accesses, and the greater a likelihood of benefitting from wider index nodes. In general, it may be expected that an optimal number of cache lines per node w.sub.optimal will not exceed the normalized bandwidth B. Beyond that point a binary search could have been competed with readiness to move down to the next level in the tree. The second system parameter that potentially limits the optimal node size is the size of the cache, although in practice this does not appear to be a limitation given realistic values of the normalized bandwidth B. Now consider a more quantitative analysis of an optimal node width w.sub.optimal. A pB.sup.+ -Tree with N (key, tupleID) pairs contains at least ##EQU2## levels. Using a data layout optimization that employs putting keys before child pointers, three out of four nodes are read on average. Therefore, the average memory stall time for a search in a full tree may be expressed as: ##EQU3## By computing the value of w that minimizes this cost, we can find the optimal node width w.sub.optimal. For example, in our simulations where m=8 and B=15, by averaging over tree sizes N=10.sup.3, . . . , 10.sup.9, it may be computed from the equation above that the optimal node width w.sub.optimal equals 8. If the memory subsystem bandwidth increases such that B equals 50, then the optimal node width w.sub.optimal increases to 22. When comparing the pB.sup.+ -Trees with conventional B.sup.+ -Trees, better search performance, comparable or somewhat better update performance, and lower space overhead may be expected. Having addressed index search performance, index range scans will now be addressed. Given starting and ending keys as arguments, an index range scan returns a list of either the tupleIDs or the tuples themselves with keys that fall within this range. First, a starting key is searched in the B.sup.+ -Tree to locate a starting leaf node. Then a scan follows the next-leaf pointers, visiting the leaf nodes in order. As the scan proceeds, the tupleIDs (or tuples) are copied into a return buffer. This process stops when either the ending key is found or the return buffer fills up. In the latter case, the scan procedure pauses and returns the buffer to the caller (often a join node in a query execution plan), which then consumes the data and resumes the scan where it left off. Therefore, range selection involves one key search and often multiple leaf node scan calls. Range selections that return tupleIDs will be specifically addressed, although returning the tuples themselves or other variations is a straightforward extension of the algorithm. Turning now to FIGS. 4A, 4B, and 4C collectively, illustrated are graphs, generally designated 400A, 400B, 400C respectively, showing cache misses versus cycle times for various scan situations. In general and without prefetching, the cache performance of range scans may suffer by over 84% due to data cache misses. FIG. 3A illustrates this situation where a full cache miss latency is suffered for each leaf node. A partial solution to this situation is to make the leaf nodes multiple cache lines wide and prefetch each component of a leaf node in parallel. This may reduce the frequency of expensive cache misses, as illustrated in FIG. 4B. While this is helpful, a goal to hide fully the miss latencies to the extent permitted by the memory system, may be achieved as illustrated in FIG. 4C. To accomplish this goal, a pointer-chasing problem needs to be overcome. Assuming that three nodes worth of computation are needed to hide a miss latency, then when a node n.sub.i is visited one would like to be launching a prefetch of a node n.sub.i+3. To compute the address of the node n.sub.i+3, the pointer chain would normally follow through the nodes n.sub.i+1 and n.sub.i+2. However, this would incur a full miss latency to fetch the node n.sub.i+1 and then to fetch the node n.sub.i+2, before the prefetch of the node n.sub.i+3 could be launched, thereby defeating our goal of hiding the miss latency of n.sub.i+3. The concept of jump pointers that are customize to the specific needs of B.sup.+ -Tree indices may be employed. In an exemplary embodiment of the present invention, jump pointer arrays are separate arrays that store these jump pointers, rather than storing jump pointers directly in the leaf nodes. The jump pointer arrays may also employ a back-pointer associated with a starting leaf node to locate the leaf's position within the jump pointer array. Then, based on a desired index prefetching distance, an array offset is adjusted to find the address of the appropriate leaf node to prefetch. As the scan proceeds, the prefetching task simply continues to walk ahead in the jump-pointer array (which itself is also prefetched) without having to dereference the actual leaf nodes again. Jump-pointer arrays are more flexible than jump pointers stored directly in the leaf nodes. The prefetching distance may be adjusted by simply changing the offset used within the jump pointer array. This allows dynamic adaptation to changing performance conditions on a given machine, or if an associated software code is migrated to a different machine. In addition, the same jump-pointer array can be reused to target different latencies in the memory hierarchy (e.g., disk latency vs. memory latency). From an abstract perspective, one might think of the jump-pointer array as a single large, contiguous array as will be discussed with respect to FIG. 5A below. This configuration may be efficient in read-only situations, but would typically create problems in other situations. A key issue in implementing jump-pointer arrays may involve updates. Turning now to FIG. 5A, illustrated is a block diagram showing an embodiment of a tree structure, generally designated 500A, employing an independent and contiguous jump pointer array. The tree structure 500 includes a collection of non-leaf nodes collectively designated 505A, a collection of leaf nodes collectively designated 510A and a jump pointer array 515A having a single, contiguous array arrangement. This independent, single, contiguous jump pointer array 515A may create a problem during updates, however. When a leaf is deleted, an empty slot is typically left in the single contiguous array. When a new leaf is inserted, an empty slot needs to be created in the appropriate position for a new jump pointer. If no nearby empty slots can be located, this may potentially involve copying a very large amount of data within the single contiguous jump pointer array 515A to create the empty slot. In addition, for each jump-pointer that is moved within the single contiguous jump pointer array 515A, the corresponding back-pointer from the leaf node into the array also needs to be updated, which may be very costly to performance. Turning now to FIG. 5B, illustrated is a block diagram showing an embodiment of a tree structure, generally designated 500B, employing a chunked, independent jump pointer array constructed in accordance with the principles of the present invention. The tree structure 500B includes a collection of non-leaf nodes 505B, a collection of leaf nodes 510B and a chunked jump point array 515B having link lists with hint back-pointers. The chunked jump point array 515B allows several performance improvements over a contiguous jump pointer array such as that discussed with respect to FIG. 5A above. First, breaking a contiguous array into a chunked linked list, as illustrated in FIG. 5B, allows the impact of an insertion to its corresponding chunk to be limited. Second, actively attempting to interleave empty slots within the chunked jump pointer array 515B allows insertions to proceed more quickly. During a bulkload or when a chunk splits, the jump pointers are stored such that empty slots are evenly distributed to maximize the chance of finding a nearby empty slot for insertion. When a jump-pointer is deleted, an empty slot in the chunk is left. Finally, the meaning of a back-pointer in a leaf node corresponding to its position in the jump-pointer array is altered such that it is merely a "hint". The pointer may point to the correct chunk, but a position within that chunk may be imprecise. Therefore when moving jump pointers in a chunk for inserting a new leaf address, there is no need to update the hints for the moved jump pointers. A hint field may be updated when the precise position in the jump-pointer array is looked up during a range scan or insertion. In this case the leaf node should be already in cache and updating the hint requires minimum overhead. Additionally, a hint field may be updated when a chunk splits and addresses are redistributed. In this case, updating the hints to point to the new chunk is forced. The cost of using hints, of course, is that searching for the correct location within the chunk in some cases is required. In practice, however, the hints appear to be good approximations of the true positions, and searching for the precise location is not a costly operation (e.g., it should not incur many if any cache misses). In summary, the net effect of these enhancements is that nothing moves during deletions, and typically only a small number of jump pointers (between the insertion position and the nearest empty slot) move during insertions. In neither case does updating the hints within the leaf nodes normally occur. Thus we expect these jump-pointer arrays to perform well during updates. Having described a data structure to facilitate prefetching, an exemplary embodiment of a prefetching algorithm may now be described. Recall that a basic range scan algorithm consists of a loop that visits a leaf on each iteration by following a next-leaf pointer. To support prefetching, prefetches are added both prior to this loop (for the startup phase), and inside the loop (for the steady-state phase). Let k be the desired prefetching distance, in units of leaf nodes (a selection approach for selecting k is discuss below). During a startup phase, prefetches are issued for the first k leaf nodes. These prefetches proceed in parallel, exploiting the available memory hierarchy bandwidth. During each loop iteration (i.e., in the steady-state phase) and prior to visiting the current leaf node in the range scan, the leaf node that is k nodes after the current leaf node is prefetched. The goal is to ensure that by the time the basic range scan loop is ready to visit a leaf node, that node is already prefetched into the cache. With this framework in mind, further details of an exemplary embodiment may be described. First, in a startup phase, it is advantageous to locate the jump pointer of the starting leaf within the jump-pointer array. To do this, follow the hint pointer from the starting leaf to see whether it is precise (i.e., whether the hint points to a pointer back to the starting leaf). If not, then start searching within the chunk in both directions relative to the hint position until the matching position is found. Usually, the distance between the hint and the actual position appears to be small in practice. Second, prefetch the jump-pointer chunks as well as the leaf nodes and handle empty slots in the chunks. During a startup phase, both the current chunk and the next chunk are prefetched. When looking for a jump pointer, test for and skip all empty slots. If the end of the current chunk is reached, go to the next chunk to get the first non-empty jump-pointer (there is at least one non-empty jump pointer or the chunk should have been deleted). Then, prefetch the next chunk ahead in the jump-pointer array. The next chunk is expected to be in the cache by the time it is accessed since it is always prefetched before prefetching any leaf nodes pointed to by the current chunk. Third, although the actual number of tupleIDs in the leaf node is unknown when range prefetching is done, it is assumed that the leaf is full and the return buffer area is prefetched accordingly. Thus, the return buffer will always be prefetched sufficiently early. Selecting the index prefetching distance and the chunk size may now be addressed. A value of an index prefetching distance k, (where the value of the prefetching distance k is in units of nodes to prefetch ahead) may be selected as follows. Normally this quantity is derived by dividing the expected worst-case miss latency by the computation time spent on one leaf node. However, because the computation time associated with visiting a leaf node during a range scan is quite small relative to the miss latency, it will be assumed that the limiting factor is the memory bandwidth B. One may estimate this bandwidth-limited prefetching distance as k=B/w, where B is the normalized memory bandwidth and w is the number of cache lines per leaf node, as defined in Table 1. In practice, there is no problem with increasing k to create a performance margin, since any prefetches that cannot proceed are simply buffered within the memory system. In selecting a chunk size c, chunks must be sufficiently large to ensure that prefetching one chunk ahead to hide a miss latency of accessing the chunks themselves is assured. During the steady-state phase of a range scan associated with obtaining a new chunk, the next chunk is immediately prefetched ahead so that its fetch time can be overlapped with the time it takes to prefetch the leaf nodes associated with the current chunk. Since the memory hierarchy only has enough bandwidth to initiate B cache misses during the time it takes one cache miss to complete, the chunks would clearly be large enough to hide the latency of fetching the next chunk if they contained at least B leaf pointers (there is at least one cache line access for every leaf visit). For a full tree with no empty leaf slots and no empty chunk slots, each cache line can hold 2 m leaf pointers (since there are only pointers and no keys). In this case in can be estimated that the minimum chunk size c in units of cache lines is c=B/2 m. To account for empty chunk slots, the denominator (2 m) may be multiplied by the occupancy of chunk slots (a value similar to the bulkload factor), which would increase the value of the minimum chunk size c somewhat. Another factor that may dictate the minimum chunk size c is that each chunk should contain at least k leaf pointers so that the prefetching algorithm may operate sufficiently far ahead. However, since the prefetching distance k is less than or equal to the normalized memory bandwidth B, the chunk size c in the equation above should be sufficient. Increasing the chunk size c beyond this minimum value to account for empty leaf nodes and empty chunk slots will typically improve performance, however. Given sufficient memory system bandwidth, the prefetching scheme of this exemplary embodiment tends to hide the full memory latency experienced at every leaf node visited during range scan operations. Additionally, good performance on updates is also anticipated. However, there is a space overhead associated with employing a jump-pointer array. Since the jump pointer array may only contain one pointer per leaf node, the space overhead is relatively small. Since a next-leaf pointer and a back-pointer are stored in every leaf, there are at most d-2(key, tupleID) pairs in every leaf nodes (where d is defined in Table 1). So, the jump pointer for a full leaf node only takes 1/2(d-2) as much space as the leaf node. The resulting increase in the fanout d for creating wider B.sup.+ -Tree nodes will help reduce this overhead. However, this space overhead may be reduced further. Turning now to FIG. 6, illustrated is a block diagram of an embodiment of a tree structure, generally designated 600, employing an internal jump pointer array constructed in accordance with the principles of the present invention. The tree structure 600 includes a collection of non-leaf nodes 605, a collection of leaf nodes 610 and a collection of internal jump pointer arrays 615. In the preceding embodiments, discussions and examples were presented that described how a jump-pointer array may be implemented by creating a new external structure to store the jump pointers (as illustrated earlier with respect to FIGS. 5A and 5B). However, there is an existing structure within a B.sup.+ -Tree, for example, that already contains pointers to the leaf nodes, namely, the parents of the leaf nodes. These parent nodes may be called bottom non-leaf nodes. Child pointers within a bottom non-leaf node correspond to the jump-pointers within a chunk of the external jump-pointer array as was described above. A key difference, however, is that there is typically no easy way to traverse these bottom non-leaf nodes quickly enough to perform prefetching. A potential solution is to connect these bottom non-leaf nodes together in leaf key order using linked-list pointers. FIG. 6 illustrates this concept as the internal jump-pointer arrays 615. It may be noted that leaf nodes do not contain back-pointers to their positions within their parents. However, such pointers are not necessary for this internal implementation, since the position will be determined during the search for the starting key. Simply retaining the result of the binary search of the bottom non-leaf nodes 610, will produce the position to appropriately initiate the prefetching operation. This approach is attractive with respect to space overhead, since the only overhead is one additional pointer per bottom non-leaf node 610. The overhead of updating this pointer may be substantially insignificant, since it only needs to be changed in the rare event that a bottom non-leaf node splits or is deleted. A potential limitation of this approach, however, is that the length of a "chunk" in this embodiment of a jump-pointer array is dictated by the B.sup.+ -Tree structure and may not be easily adjusted to satisfy large prefetch distance requirements (e.g., for hiding disk latencies) Turning now to FIG. 7, illustrated is a flow diagram of an embodiment of a method of prefetching, generally designated 700, constructed in accordance with the principles of the present invention. The method 700, for use with a cache memory associated with a database employing indices, starts in a step 705 and proceeds to a first decisional step 710. The first decisional step 710 determines if a database search is to be performed, and the method 700 proceeds to a step 715 if a search is to be performed. A search includes prefetching cache lines containing an index of a node of a tree structure associated with the database. The step 715 identifies the index nodes whose associated cache lines are to be prefetched. In the illustrated embodiment of method 700, a binary search is performed and each cache line associated with selected nodes along a path from a root node to a leaf node of the tree structure may be considered for prefetching. In an alternative embodiment, each cache line associated with a selected node of the tree structure may be considered for prefetching. Then, in a step 720, the appropriate cache lines are prefetched and the method 700 ends in a step 725. Returning to the first decisional step 710 and for the case where a database search is not to be performed, a second decisional step 730 determines if a database scan is to be performed. Performing a database scan includes prefetching cache lines based on an index prefetch distance between first and second leaf nodes of the tree structure. The index prefetch distance is determined in a step 735 employing an external jump pointer array or an internal jump pointer array wherein the internal jump pointer array uses at least two bottom non-leaf nodes of the tree structure. Then, in a step 740, the appropriate cache lines are prefetched and the method 700 ends in a step 725. If a database scan is not to be performed in the second decisional step 730, the method 700 returns to the first decisional step 710. In summary, several embodiments of a prefetch system for use with a cache memory that is associate d with a database employing indices have been provided. Additionally, embodiments of a database management system employing the prefetch system and a method of prefetching have also been provided. In general, the prefetch system and method of prefetching accelerate the two important operations of searches and range scans on B.sup.+ -Tree indices. To accelerate searches, pB.sup.+ -Trees use prefetching to effectively create wider nodes than the natural data transfer size (e.g., eight vs. one cache lines or disk pages). These wider nodes reduce the height of the B.sup.+ -Tree, thereby decreasing the number of expensive misses when going from parent to child without significantly increasing the cost of fetching a given node. The results of the embodiments presented indicate that for an index search, the prefetch system may achieve an increase of 1.27 to 1.55 over the B.sup.+ -Tree, by decreasing the height of the tree. Additionally, for an index scan, the prefetch system may achieve an increase of 3.5 to 3.7 over the B.sup.+ -Tree, again due to the faster search and wider nodes. Moreover, jump-pointer arrays were proposed, which enable effective range scan prefetching across node boundaries. Overall, the pB.sup.+ -Tree achieves a speedup of about 6.5 to 8.7 over the B.sup.+ -Tree for range scans. For index updates (insertions and deletions), the technique may achieve an increase of 1.24 to 1.52 over the B.sup.+ -Tree, due to faster search and less frequent node splits with wider nodes. Of course, application of the principles of the present invention to other current or future developed tree structures is well within the broad scope of the present invention. Although the present invention has been described in detail, those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the invention in its broadest form.
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