Frame-based modulus interleaver5933431Abstract The frame based modulus interleaver is used in a digital communications system. The interleaver uses an algorithm which insures that all of the data blocks which are present in the each input frame are output in a single output frame. This is accomplished, in accordance with the invention, by using a modulus operation to determine the location of each block which is input into the interleaver. Claims I claim:
______________________________________
D K S Offset
______________________________________
Any P - 2 1 2
Any P - 1 0 1
Any 0 0 0
Any 1 0 D(P - 1) - 1
Any 2 P - 1 D(P - 1) - 2
1 Even (P - K/2) mod P
0
1 Odd (P - K)/2 0
none of the above
not valid
______________________________________
3. The improved interleaver of claim 2, wherein said interleaver logic data blocks from a location, n, within an input frame to a location, m, in an output frame associated with said input frame, whereby all of the data blocks in said input frame are moved into said output frame, said interleaving interleaver operating in accordance with procedure set forth in the following steps: ##EQU7## 4. A de-interleaver for use with the invention defined in claim 3, said de-interleaver rearranging data blocks in a received frame of data into the sequence corresponding to the sequence which said data blocks had when they were input into said interleaver. 5. The de-interleaver of claim 4, wherein said de-interleaver logic makes use of P delay values, DelayVal( ), said delay values being determined in accordance with the following procedure: 6. The de-interleaver of claim 5, which receives a frame of data having data blocks y(n), where n ranges from 0 to FS-1, said de-interleaver logic moving a data block from position n to position m in a de-interleaver output data block, z(m), said de-interleaver logic operating in accordance with the following steps: 7. An improved de-interleaver, for use in a communications system, of the type which receives an input frame comprising a plurality of interleaved data blocks, and outputs an output frame having said interleaved data blocks de-interleaved therein, the de-interleaver logic configured to ensure that each output frame has the same frame size, FS, as said input frame and for providing that each output frame contains all of the data blocks which were contained in said input frame, wherein said de-interleaver logic makes use of a de-interleaver delay sequence of length P, wherein the increment between respective values in said delay sequence is D, and wherein said de-inteleaver logic receives the frame size, FS, the delay sequence length, P, and the increment, D, as parameters to be used to produce the output frame having the de-interleaved data blocks therein, and wherein the de-interleaver logic is configured to ensure that the output frame has the frame size, FS. 8. The improved de-interleaver logic of claim 7, wherein said de-interleaver further includes a base value, S, and an offset value, Offset, which are determined from the values of P, D and FS, such that for FS greater than or equal to the interleaver propagation delay of D(P-1) and for K equal to (FS-P*D) mod P, values of S and Offset are selected from the following table:
______________________________________
D K S Offset
______________________________________
Any 0 P - 1 0
Any 1 P - 1 D(P - 1) - 1
Any P - 1 D + 1 1
P - 2 2 D D(P - 1) - 2
P - 2 P - 2 0 2
1 2 P - 1 P - 2
1 P - 2 2 1
1 4n + 1 P - 2n P - (2n + 1)
1 P - (4n + 1) 2n + 1 2n
none of the above not valid
______________________________________
9. The improved de-interleaver of claim 8, wherein said de-interleaver logic moves data blocks from a location, n, within an input frame to a location, m, in an output frame associated with said input frame, whereby all of the data blocks in said input frame are moved into said output frame, said de-interleaver logic operating in accordance with the following steps: ##EQU8## Description BACKGROUND OF THE INVENTION
______________________________________
Parameter Description
______________________________________
FS corresponding to the frame size, i.e., the number of
blocks in a frame;
P the length of the interleaver delay sequence;
D the increment used in the interleaver delay sequence;
S the base value used to determine the interleaver delay
(which determines the initial delay value in the
sequence); and
Offset an offset, which is a constant which is added to the
frame size to create the modulus value for recovering
samples which are shifted out of the original
______________________________________
frame.
From the foregoing, the following can be computed:
______________________________________
Parameter
Description
______________________________________
Delay the propagation delay of the interleaver/de-interleaver
pair, which is equal to D(P - 1); and
DelayVal()
the array of length P containing the de-interleaver delay
sequence.
______________________________________
In selecting the foregoing parameters, P and (D+1) must be relatively prime, i.e., they must have no common factors. The propagation delay through the interleaver/de-interleaver pair is D(P-1). This is also the maximum delay experienced by any sample in either the interleaver or the de-interleaver. Although the de-interleaver delays can be established by inspection in the design phase, due to the many-to-one nature of the modulus operation (n mod P) used in the interleaver delay determination, there is no easy rule for generating the delay for a specific y(m) directly from the received index, m. In practice, the de-interleaver delay sequence (and also the interleaver delay sequence) is stored in an array, DelayValo, of size P, and the delay values are retrieved from the array as needed. The P delay values for the de-interleaver array, DelayVal() can be determined in accordance with the procedure set forth in the flow chart of FIG. 3 which implements the following pseudocode: ##EQU1## As described above, the frame based modulus interleaver of the present invention provides a mechanism for keeping interleaved samples within the same frame as the one in which they started. A generalized method for designing the frame-based modulus interleaver based upon the values of P, D, and the frame size, FS, is described in accordance with the present invention which uses an algorithm to place sample blocks which would otherwise be shifted out of the frame into vacant positions within the frame. The interleaver and de-interleaver algorithms are provided below. In the de-interleaver algorithm, the constant propagation delay is subtracted from the output index so that the output samples are aligned with the frame boundaries. In accordance with the invention, the interleaver algorithm is described with reference to FIG. 4, and in pseudocode as follows: ##EQU2## Similarly, the de-interleaver algorithm is described in the flow chart of FIG. 5 which implements the following pseudocode: ##EQU3## By way of specific example, a frame based modulus interleaver and de-interleaver is shown below, in Table II, for the following parameters: P=5; D=2; FS=18; S=1; Offset=2 Using the algorithm set forth above (See FIG. 3), the de-interleaver values for DelayVal(0) through DelayVal(4) can be determined (from the values of P and D) to be: DelayVal(0)=4; DelayVal(1)=0; DelayVal(2)=6; DelayVal(3)=2; DelayVal(4)=8; The values of S and Offset depend on P, D, and FS. As there are combinations of P, D, and FS for which no values of S and Offset can be found which satisfy the criteria for the frame based modulus interleaver of the present invention, i.e., there are combinations of values of P, D, and FS for which it is not possible to generate a unique interleaved index within the original frame for each input sample, P, D, and FS must be selected such that the relationships shown in the following rules are satisfied: 1. FS must be greater than or equal to the interleaver propagation delay, of D(P-1). 2. For K=(FS-(P*D)) mod P, S and Offset are selected from Table I, below. If more than one relationship applies (which may be the case for P<5), any valid relationship will result in a valid set of parameters. Note that for the special case of D=1, valid sets of S and Offset can always be found, regardless of frame size, FS. As a frame size, FS, of 18 was selected, using the foregoing values for FS, P, and D, the value of K is found to be (18-(5*2) mod 5), i.e., K=3. Using Table I, below, it can be seen that as K=P-2, S should be chosen to be 1, and Offset should be chosen to be 2, as set forth above.
TABLE I
______________________________________
D K S Offset
______________________________________
Any P-2 1 2
Any P-1 0 1
Any 0 0 0
Any 1 0 D(P - 1) - 1
Any 2 P-1 D(P - 1) - 2
1 Even (P-K/2) mod P
0
1 Odd (P-K)/2 0
none of the above
not valid
______________________________________
Referring now to Table II, below, the interleaving in accordance with the present invention, using the foregoing values, is illustrated. Bold entries in Table II identify samples which were relocated as a result of the frame-based modulus process of the present invention.
TABLE II
__________________________________________________________________________
original sequence
x0 x1 x2 x3 x4
x5 x6 x7
x8 x9
x10
x11
x12
x13
x14
x15
x16
x17
interleaver delay
2 4 6 8 0 2 4 6 8 0 2 4 6 8 0 2 4 6
interleaved sequence
x16
x13
x0 x17
x4
x1 x12
x5
x2 x9
x6 x3 x10
x7 x14
x11
x8 x15
de-interleaver delay
4 0 6 2 8 4 0 6 2 8 4 0 6 2 8 4 0 6
De-interleaved sequence
x0 x1 x2 x3 x4
x5 x6 x7
x8 x9
x10
x11
x12
x13
x14
x15
x16
x17
(delay removed)
__________________________________________________________________________
In general, the interleaver algorithm may be implemented in-place, so that no additional buffering is needed beyond that necessary to hold the current frame's data. Since samples from the end of the frame are wrapped back to the beginning of the frame, the interleaver algorithm must be performed on the entire frame of data (not on a sample-by-sample, i.e., not on a block-by-block, basis). The de-interleaver (receiver) algorithm can be performed as the samples are received in real-time. Since the wrapped values are available (at the beginning of the frame) before they are needed (at the end of the frame), no delay is added as a result of the use of the frame modulus operation of the present invention. Those skilled in the art will recognize that while in the preferred embodiment of the invention the interleaver delay values increment sequentially, and the de-interleaver values are determined algorithmically, the invention can also be implemented so that the de-interleaver delay values increment sequentially. In that case, the values for the interleaver delays (rather than the de-interleaver delays) would be determined algorithmically, and corresponding sets of rules can be generated for determination of P, D, FS, S, and Offset. As will be recognized, the relationship between P, D, and FS would be somewhat more limited than in the case described above. Thus, the algorithm to determine DelayValo() can be determined in accordance with the procedure set forth in the flow chart of FIG. 6 which implements the following pseudocode: ##EQU4## Similarly, the interleaver algorithm would be modified to conform to FIG. 7, and in pseudocode as follows: ##EQU5## The de-interleaver algorithm, illustrated in the flow chart of FIG. 8, would be expressed in pseudocode as: ##EQU6## By way of specific example, a frame based modulus interleaver and de-interleaver is shown below, in Table II, for the following parameters: P=5; D=2; FS=19; S=3; Offset=1 Using the algorithm set forth above (See FIG. 6), the de-interleaver values for DelayVal(0) through DelayVal(4) can be determined (from the values of P and D) to be: DelayVal(0)=4; DelayVal(1)=0; DelayVal(2)=6; DelayVal(3)=2; DelayVal(4)=8; The values of S and Offset depend on P, D, and FS. As there are combinations of P, D, and FS for which no values of S and Offset can be found which satisfy the criteria for the frame based modulus interleaver of the present invention, i.e., there are combinations of values of P, D, and FS for which it is not possible to generate a unique interleaved index within the original frame for each input sample, P, D, and FS must be selected such that the relationships shown in the following rules are satisfied: 1. FS must be greater than or equal to the interleaver propagation delay, of D(P-1). 2. For K=(FS-(P*D)) mod P, S and Offset are selected from Table III, below. If more than one relationship applies, any valid relationship will result in a valid set of parameters. As a frame size, FS, of 19 was selected, using the foregoing values for FS, P, and D, the value of K is found to be (19-(5*2) mod 5 ), i.e., K=4. Using Table III, below, it can be seen that as K=P-1, S should be chosen to be 3, and Offset should be chosen to be 1, as set forth above.
TABLE III
______________________________________
D K S Offset
______________________________________
Any 0 P - 1 0
Any 1 P - 1 D(P - 1) - 1
Any P - 1 D + 1 1
P - 2 2 D D(P - 1) - 2
P - 2 P - 2 0 2
1 2 P - 1 P - 2
1 P - 2 2 1
1 4n + 1 P - 2n P - (2n + 1)
1 P - (4n + 1) 2n + 1 2n
none of the above not valid
______________________________________
Referring now to Table IV, below, the interleaving in accordance with the present invention, using the foregoing values, is illustrated. Bold entries in Table IV identify samples which were relocated as a result of the frame-based modulus process of the present invention.
TABLE IV
__________________________________________________________________________
original sequence
x0 x1
x2 x3 x4
x5
x6
x7 x8
x9
x10
x11
x12
x13
x14
x15
x16
x17
x18
interleaver delay
4 0 6 2 8 4 0 6 2 8 4 0 6 2 8 4 0 6 2
interleaved sequence
x18
x1
x14
x17
x0
x3
x6
x15
x2
x5
x8 x11
x4 x7 x10
x13
x16
x9 x12
de-interleaver delay
6 8 0 2 4 6 8 0 2 4 6 8 0 2 4 6 8 0 2
De-interleaved sequence
x0 x1
2 x3 x4
x5
x6
x7 x8
x9
x10
x11
x12
x13
x14
x15
x16
x17 x18
(delay removed)
__________________________________________________________________________
|
Same subclass Same class |
||||||||||