Cascading synchronized chaotic systems5379346Abstract A cascaded synchronized nonlinear system includes a nonlinear transmitter having stable first and second subparts. The first subpart produces a first transmitter signal for driving the second subpart and the second subpart produces a second transmitter signal for driving the first subpart. The nonlinear transmitter transmits the second transmitter signal to a nonlinear cascaded receiver. The receiver, being for producing an output signal in synchronization with the second transmitter signal, includes a first stage (a duplicate of the first subpart) responsive to the second transmitter signal for producing a first receiver signal. The receiver further includes a second stage (a duplicate of the second subpart) responsive to the first receiver signal for producing the output signal. The cascaded synchronized nonlinear system can be used in an information transfer system. The transmitter, responsive to an information signal produces a drive signal for transmission to the receiver. An error detector compares the drive signal and the output signal produced by the receiver to produce an error signal indicative of the information contained in the information signal. Claims What is claimed is: Description CROSS REFERENCE TO RELATED PATENTS AND APPLICATIONS
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Resistor 42 = 10 K.OMEGA.
Resistor 64 = 150 K.OMEGA.
Resistor 46 = 10 K.OMEGA.
Resistor 66 = 150 K.OMEGA.
Resistor 48 = 20 K.OMEGA.
Resistor 68 = 330 K.OMEGA.
Resistor 50 = 100 K.OMEGA.
Resistor 70 = 100 K.OMEGA.
Resistor 52 = 50 K.OMEGA.
Resistor 72 = 100 K.OMEGA.
Resistor 54 = 3 K.OMEGA.
Potentiometer 74 = 10 k.OMEGA.
Resistor 56 = 20 K.OMEGA.
Capacitor 76 = 0.01 .mu.F
Resistor 58 = 100 K.OMEGA.
Capacitor 78 = 0.01 .mu.F
Resistor 60 = 100 K.OMEGA.
Capacitor 80 = 0.001 .mu.F
Resistor 62 = 220 K.OMEGA.
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Drive circuit 22 can be subdivided into two subparts 14 and 12. Although the illustrative subparts 14 and 12 shown in FIG. 2 correspond to the two circuits forming drive circuit 22, this is not necessary, and the division of a given drive circuit into subparts in order to determine the proper configuration for a synchronized response circuit is made in accordance with the analysis described herein. Subpart 14 corresponds to the w subsystem (subsystem 14 in FIG. 1), subpart 12 corresponds to the v subsystem described above. Those parts of subpart 14 which affect the signal at X4 and those parts of subpart 12 responsive thereto, respectively, constitute response part 15 (FIG. 6) and drive part 17 (FIG. 6), to provide feedback. Response circuit 16 is substantially a duplicate of subpart 14 of drive circuit 22 (the specifications for primed components, such as resistor 50', is the same as the specification for unprimed components, such as resistor 50) and corresponds to subsystem w' (subsystem 16) described hereinabove. Signals X.sub.1, X.sub.2, X.sub.3, and X.sub.4 are characteristic voltages of drive circuit 22. The signal X.sub.4 is connected as drive signal S.sub.d through a buffer amplifier 25, which ideally is an operational amplifier having linear characteristics such as an AD381 manufactured by Analog Devices, to response circuit 16 at the junction in circuit 16 corresponding to the junction in circuit 22 at which the signal X.sub.4 is generated. Signal X.sub.4 replaces the circuitry (subpart 12) of drive circuit 22 which is missing in response circuit 16. The subsystem of buffer amplifier 25 is the secondary means 19. Drive circuit 22 is an autonomous system and behaves chaotically. It can be modeled by the following equations of motion for the three voltages X.sub.1, X.sub.2 and X.sub.3 shown in FIG. 2. X.sub.1 =X.sub.2 +.gamma.X.sub.1 +cX.sub.3 X.sub.2 =-.omega..sub.2 X.sub.1 -.delta..sub.2 X.sub.2 .epsilon.X.sub.3 =(1-X.sub.3).sup.2 (sX.sub.1 -r+X.sub.3)-.delta..sub.3 X.sub.3, (9) where .gamma.=0.12, C=2.2, .omega..sub.2 =10.0, .delta..sub.2 =.delta..sub.3 =0.001, .epsilon.=0.001, s=1/6, and r=0.0. An analysis of the sub-Lyapunov exponents for the response circuit 16 requires a transformation of the equations of motion from the (X.sub.1, X.sub.2, X.sub.3) system to the (X.sub.1, X.sub.2, X.sub.4) system. This is done by analyzing the circuit, and finding that X.sub.3 =.alpha.X.sub.4 -.beta.X.sub.1 where .alpha.=6.6 and .beta.=7.9. This gives the following equations of motion: X.sub.1 =X.sub.2 +.gamma.X.sub.1 +c(.alpha.X.sub.4 -.beta.X.sub.1) X.sub.2 =-.omega..sub.2 X.sub.1 -.delta..sub.2 X.sub.2 .epsilon.X.sub.4 =(1/.alpha.){(1-(.alpha.X.sub.4 -.beta.X.sub.1).sup.2)(sX.sub.1 -r+.alpha.X.sub.4 -.beta.X.sub.1)-.delta..sub.3 .alpha.X.sub.4 -.beta.X.sub.1 -.beta.X.sub.2 -.beta..gamma.X.sub.1 -.beta.c(.alpha.X.sub.4 -.beta.X.sub.1)}(10) The equations of motion for the response are just the X.sub.1 and X.sub.2 equations. The sub-Lyapunov exponents are calculated directly from the Jacobian of the X.sub.1 and X.sub.2 equations, which is a constant in this case. It will be appreciated that conventional methods for calculating Lyapunov exponents, as analytical, measurement, numerical and otherwise can be used, such as, for example, those described by Eckmann et al., Rev. Mod. Phys., Vol. 57, p. 617 et seq. (1985); Lichtenberg et al., Regular and Stochastic Motion, Springer-Verlag, New York (1983); Rashband, Chaotic Dynamics of Nonlinear Systems, John Wiley and Sons, New York (1990); and Wolf et al., Physica, Vol. 16D, p. 285 et seq. (1985). The sub-Lyapunov exponents in this case are -16.587 and -0.603, implying that synchronization of the two electrical circuits 22 and 16 will occur. X.sub.4 is the drive signal S.sub.d for the response subsystems and (X.sub.1, X.sub.2) and (X.sub.1 ' , X.sub.2 ') are the synchronized signals S.sub.o and S.sub.o '. Circuit 22 itself runs in the realm of a few hundred Hz. Response circuit 16 synchronizes with drive circuit 22 within about two milliseconds. It has been observed experimentally that small changes (.about.10%) of the circuit parameters do not affect synchronization greatly, in that the response voltages still remain close to their counterparts in drive circuit 22; but larger changes (.about.50%) do. Even though the sub-Lyapunov exponents for the larger changes both remain negative, the response voltages no longer remain close to their drive counterparts. The circuit of FIG. 2 has been used to transmit a pure frequency signal hidden in a chaotic signal as follows. With circuits 22 and 16 operating in a synchronized mode, a sine wave of a few hundred Hz was added to the X.sub.2 signal from the drive circuit and sent to the response circuit The X'.sub.2 signal produced by response circuit 16 was then subtracted from the sum of the X.sub.2 signal and the sine wave, thereby extracting the sine wave from the chaotic signal. Spectral analysis of the (X.sub.2 +sine wave) combination signal showed that the sine wave could not be detected in the chaos of the X.sub.2 signal. The smallest sine wave that could be extracted this way was approximately 40 millivolts peak to peak compared to a two volt peak to peak X.sub.2 signal, or a 50:1 ratio of chaotic signal to sine wave. Many other possible choices for the drive circuit are possible and may require transformation of the circuit equations to model them. This can be determined as described hereinabove for nonlinear circuits by analyzing the circuit dynamics in terms of the sub-Lyapunov exponents to determine which signal(s) to choose as a drive signal or signals, and which subcircuit is to be used as a model for the response circuit. Referring to FIGS. 3-5 and 7-8, more practical communications systems for encrypted communication which incorporate and apply the synchronized system of FIGS. 1, 2 and 7 will now be described. As shown in FIG. 7, the synchronized system 10 with drive system 9, subsystems 12 and 14 and response subsystem 16 form part of this system 400. A first combiner 440 coupled to subpart 14 then combines an information signal S.sub.i with the signal S.sub.o from subpart 14 to form at least one first intermediate signal S.sub.int1. A driver 450 coupled to subpart 16 is responsive to the first intermediate signal S.sub.int1 and the signal S.sub.o ' from subpart 16 so as to derive the information signal S.sub.i. It will be appreciated that other embodiments of synchronized system 10 discussed above, including those shown in FIG. 6, can be included in this encryption application. As an example of the application shown in FIG. 7, referring to FIG. 3, driver circuit 9 of FIG. 1 forms part of a transmitter 100 and response circuit 16 of FIG. 1 forms part of a receiver 200. Drive signal(s) S.sub.d is(are) transmitted to response circuit 16 in any desired conventional wired or wireless fashion. Circuits 9 and 16 respectively generate low frequency synchronized chaotic signals S.sub.o and S.sub.o '. Signals S.sub.o and S.sub.o ' are respectively converted to frequency signals in amplitude to frequency converters 108 and 208 (e.g., voltage controlled oscillators), and the converted signals respectively combined in a multiplier 110 and a multiplier 210 with a 50 KHz carrier to produce first modulated chaotic signals S.sub.m1 and S.sub.m1 '. (It will be appreciated that the transmission frequency is determined in accordance with the system requirements, the desired bandwidth, and the like. It will also be appreciated that if a circuit configuration is selected for driver circuit 9 and response circuit 16 which produces chaotic signals at a sufficiently high frequency, it is not necessary to modulate a separate carrier signal in order to obtain signals S.sub.m1 and S.sub.m1 '.) The upper sideband of signal S.sub.m1 is selected by a single sideband selector 120 and further modulated with an information signal S.sub.i of 600 Hz (a frequency within the range of signal S.sub.o) in a multiplier 130 to produce a second modulated chaotic signal S.sub.m2. The upper sideband of signal S.sub.m2 is selected by a single sideband selector 140 and sent to receiver 200 in any conventional fashion, where it is modulated in a multiplier 230 by the upper side band of signal S.sub.m1 ' selected by a single side-band selector 220. The output of multiplier 230 consists of the sums and differences of the input frequencies. The difference part gives the information signal (.about.600 Hz) and the sum part gives a signal centered around 50 KHz. The output of multiplier 230 is filtered in a low bandpasts filter 250 to yield the demodulated information signal. It will be appreciated that information is effectively encrypted by being hidden in the chaotic signals which are transmitted. The at least one drive signal S.sub.d serves as a "key" to the receiver to extract the information from the chaos. The communication system of FIG. 4 is similar to that of FIG. 3, except that the information signal S.sub.i is added to the upper side-band of signal S.sub.m1 in an adder 160, and the upper side-band of signal S.sub.m1 ' is subtracted from the transmitted form of signal S.sub.m2 in a subtractor 260 in receiver 200. FIG. 8 shows another application of the present invention to communication encryption. This embodiment differs from that shown in FIG. 7 in that the information signal S.sub.i is added to the signal driving subsystem 16. The synchronized system 10 with drive system 9, subsystems 12 and 14, and response system 16 form part of this system 300. A second combiner 310 corresponds to the secondary means 19. It combines the at least one drive signal S.sub.d, output S.sub.o from subpart 14 and an information signal S.sub.i to produce at least one second intermediate signal S.sub.int2 and at least one input signal S.sub.I '. A second driver 320 coupled to subpart 16 is responsive to the at least one second intermediate signal S.sub.int2 and signal S.sub.o ' from subpart 16 so as to derive the information signal S.sub.i. An example of the system shown in FIG. 8 is shown in FIG. 5, in which at least one drive signal S.sub.d and the information carrying chaotic carrier signal are transmitted as part of a pure frequency carrier which is frequency modulated with at least one drive signal S.sub.d and amplitude modulated with the chaotic carrier signal. Specifically, transmitter 100 comprises a frequency modulation (FM) modulator 170 for modulating a pure frequency carrier S.sub.c having a frequency higher than any frequencies found in the at least one drive signal S.sub.d and the modulated chaotic carrier signal with at least one drive signal S.sub.d ; an adder 160 for adding an information signal S.sub.i to signal S.sub.o to produce first modulated signal S.sub.m1 ; and a multiplier 130 for amplitude modulation of the output of modulator 170 with signal S.sub.m1 to produce a second modulated signal S.sub.m2 for transmission to receiver 200. Receiver 200 comprises a signal splitter 280 for dividing the received signal S.sub.m2 into two equal signals S.sub.1 and S.sub.2 ; an amplitude demodulator 290 for amplitude demodulating signal S.sub.1 and a frequency demodulator 292 for frequency demodulating signal S.sub.2. The output of demodulator 292 is fed as at least one drive signal S.sub.d to response circuit 16, and the outputs of demodulator 290 and response circuit 16 are subtracted in a subtractor 260 to extract the information signal S.sub.i. It will be appreciated that variants of the foregoing methods are possible. For example, two modulated chaotic carrier signals S.sub.m21 and S.sub.m22 with low mutual correlations can be produced and combined in transmitter 100 and the information on each carrier can be separated in receiver 200 by multiplication of the received signals corresponding to S.sub.m21 and S.sub.m22 with the synchronized counterparts S.sub.m11 ' and S.sub.m12 ' of the chaotic carrier signals S.sub.m11 and S.sub.m12, and filtering the resultant signals with a low pass filter as in the embodiment of FIG. 3. It will also be appreciated that the present invention as described previously is applicable to any system which requires synchronization of remote signals and/or their low correlation with each other. For example, the present invention is particularly suited for use in control devices relying on wide-frequency-band synchronized signals. Similar principles as discussed previously can be applied to cascaded subsystems which allow the multiple signals to be synchronized. In the following discussion we build on the previously discussed design of synchronized subsystems by cascading two or more subsystem responses, i.e., using a signal produced by a subsystem to drive another subsystem. The objective here is to get a synchronization of the response with its counterpart in the drive system but to build a response setup which produces signals in synchronization with one or more of the original input drive signals. We can use this new synchronization signal to process the original input drive, to detect parameter changes between the drive system and the responses, and to detect other information transmitted along with the output of the drive system. FIG. 9A illustrates a cascaded system having a transmitter 1400 and a cascaded receiver 1500. The transmitter 1400 includes two subsystems A and B which are interdependent and may or may not overlap. Neither subsystem A nor subsystem B is contained within the other subsystem. In other words, at least part of subsystem A is external to subsystem B and at least part of subsystem B is external to subsystem A. Subsystem A drives subsystem B with signal S.sub.A and subsystem B drives subsystem A with signal S.sub.B. The receiver 1500 produces a signal S.sub.B" which is to be synchronized with a signal S.sub.B produced in the transmitter 1400. The subsystem B of transmitter 1400 transmits a drive signal S.sub.B to the receiver 1500. The receiver 1500 includes two subsystems A' and B" that are cascade connected. , i.e., the subsystem A' drives the subsystem B" and the subsystem B" does not directly drive the subsystem A'. As in the single stage subsystems discussed earlier (see FIG. 1), subsystems A' and B" are duplicates of subsystems A and B, respectively, which have all-negative sub-Lyapunov exponents. The subsystem A' receives the drive signal S.sub.B and provides a response signal S.sub.A', to the subsystem B". The subsystem B" in turn produces signal S.sub.B" in synchronization with signal S.sub.B. Unlike the single stage synchronization systems discussed earlier (see FIG. 1), in the cascade system shown in FIG. 9A, the same signal S.sub.B which the receiver 1500 synchronizes with respect to is also used to drive the receiver 1500. In the single stage synchronization system 10 of FIG. 1, the synchronized signal S.sub.o may be different than the drive signal S.sub.d. The receiver 1500 with the cascaded subsystems A' and B" is not only capable of producing the signal S.sub.B" synchronized with the signal S.sub.B but is also capable of producing the signal S.sub.A' which is in synchronization with the signal S.sub.A. Because the signal S.sub.B" can be compared to the signal S.sub.B, the fact of synchronization can be clearly determined allowing those on the receiver side to rely on the synchronization of the S.sub.B and S.sub.B" signals in concluding that signal S.sub.A' is in synchronization with signal S.sub.A. FIG. 9B illustrates a cascaded system as in FIG. 9A in more detail and where the transmitting system is a 3-dimensional system 1400. Since the transmitting system 1400 is 3-dimensional, 3 dynamic state variables are needed to define the state of the system. The transmitting system is divided into three interdependent systems X, Y and Z with produce signals S.sub.X, S.sub.Y, and S.sub.Z, respectively, signals S.sub.X, S.sub.Y, and S.sub.Z being representative of the 3 dynamic state variables. The elements Y and Z correspond to subsystem A in FIG. 9A and the elements X and Z correspond to the subsystem B in FIG. 9A. Subsystem A drives subsystem B with signal S.sub.A and subsystem B drives subsystem A with signal S.sub.B. The signals S.sub.X and S.sub.B are directly related and may be considered interchangeable in this discussion. The signals S.sub.Y and S.sub.A are also directly related and they also may be considered interchangeable in this discussion. An example of an appropriate three-dimensional system is the Rikitake Two-Disc Dynamo (A. E. Cook and P. H. Roberts, Proc. Camb. Phil. Soc., 1970, 68, 547-569) modeled by the following set of differential equations: ##EQU2## Typical parameters are .mu.=1.0, A=3.75. Such a system is chaotic, since it has at least one positive exponent and two stable subsystems. Subsystem A produces signals S.sub.y and S.sub.z and drives subsystem B with signal S.sub.A =S.sub.y. Subsystem B produces signals S.sub.x and S.sub.z and drives subsystem A with signal S.sub.B =S.sub.x. Subsystems A and B have sub-Lyapunov exponents of (-0.22, -0.55) and (-0.49, -0.51), respectively. Another example to consider is a system modeled by the following Lorenz equations: ##EQU3## For .sigma.=10, b=8/3, and r=60, this system operates in the chaotic regime, and subsystems producing variables (y,z) and (x,z) have sub-Lyapunov exponents of (-1.81, -1.86) and (-2.67, -9.99), respectively. For .sigma.=16, b=4, and r=45.92, this system operates in the chaotic regime, and subsystems producing variables (y,z) and (x,z) have sub-Lyapunov exponents of (-2.5, -2.5) and (-3.95, -16.0), respectively. Because of the nature of nonlinear dynamical systems driven in the chaotic regime, properties of one chaotic system do not necessarily carry over to another chaotic system. Nevertheless, the present invention applies to any chaotic system in general, and in particular, to non-Lorenzian systems and non-Chua systems (L. Kocarev et al., "Experimental Demonstration of Secure Communications Via Chaotic Synchronization," International Journal of Bifurcation and Chaos, Vol. 2, No. 3, (1992) 709-713; U. S. Parlitz et al., "Transmission of Digital Signals By Chaotic Synchronization", International Journal of Bifurcation and Chaos, Vol. 2, No. 4, (1992) 973-977) so long as the chaotic system includes at least two stable subsystems. The drive signal S.sub.B is transmitted to the receiver 1500 which includes two subsystems A' and B" each with elements that are interdependent. Specifically, subsystem A' is a duplicate of subsystem A of transmitter 1400, and subsystem B' is a duplicate of subsystem B of transmitter 1400. The subsystems A' and B" of receiver 1500 include elements Y', Z', X" and Z" which are duplicates of to the corresponding elements in the transmitter 1400. Note that the X' element is missing from the first subsystem A' and the Y" element is missing from the second subsystem B". The subsystems A' and B" produce responses S.sub.A' and S.sub.B", respectively, where signal S.sub.B" is in synchronization with the drive signal S.sub.B, and signal S.sub.A' is in synchronization with signal S.sub.A of the transmitter 1400. Receiver 1500 also produces signals S.sub.X", S.sub.Y', S.sub.Z' and S.sub.Z" which are in synchronization with signals Sx", Sy', Sz' and Sz", respectively, of the transmitter 1400. By using a conventional comparator, signals S.sub.B" and S.sub.B can be compared at the receiver 1500 to confirm that signals S.sub.A, S.sub.X", S.sub.Y', S.sub.Z' and S.sub.Z" are also synchronous. The two response signals or outputs S.sub.A' and S.sub.B" are produced as follows. The first subsystem A' accepts the input signal S.sub.B and produces its response signal S.sub.A' in synchronization with its counterpart (S.sub.A) in the transmitter 1400. The second subsystem B" is driven by signal S.sub.A' from the first subsystem A'. The second subsystem response S.sub.B" produces signal S.sub.B" in synchronization with its counterpart S.sub.B in the transmitter 1400, which in this case is the original drive signal S.sub.B coming from the element B. The subsystems A' and B" are selected so that all of the essential elements of the transmitter 1400 that are not present in the first subsystem A' are present in the second subsystem B" and vice-versa. In other words, the logical union of subsystems A' and B" includes all of the essential elements of the transmitter 1400. It is to be noted that each subsystem A' and B" in the receiver 1500 is driven by a signal which supplies information in the complete system 1400 which is lacking in the driven subsystem. Thus, subsystem A' in the receiver 1500 is driven by the same signal S.sub.B that drives subsystem A in the transmitter 1400, Subsystem B" in the receiver 1500 is driven by signal S.sub.A' produced by subsystem A', just as subsystem B in the transmitter 1400 is driven by signal S.sub.A produced by subsystem A. As discussed earlier, subsystems A, A', B and B" must have all-negative sub-Lyapunov exponents. In other words, subsystems A, A', B and B" are stable subsystems. The same principles discussed above concerning cascaded systems with 2 subsystems apply equally well to cascaded systems with more than 2 subsystems. In particular, each of the cascaded subsystems in the receiver is a duplicate of a stable subsystem in the transmitter. Each subsystem in the receiver is driven by a signal which supplies information from the complete system that is lacking in the driven subsystem, in particular, by a signal corresponding to the signal which drives the corresponding subsystem in the transmitter. Turning now to FIG. 10, an example of three cascaded subsystems is shown. In this arrangement the transmitter 600 is broken up into 3 subsystems A, B and C. Subsystem A includes elements W and Z; subsystem B includes elements W and X; and subsystem C includes elements Y and Z. Subsystem A is driven by signals S.sub.XA and S.sub.YA ; subsystem B is driven by signals S.sub.YB and S.sub.ZB ; and subsystem C is driven by signals S.sub.XC and S.sub.WC. Subsystems A, B and C each have all negative sub-Lyapunov exponents. The first stage of a cascaded receiver 700 is a subsystem A' which is a duplicate of subsystem A in the transmitter 600. It includes elements W' and Z'. The transmitter 600 drives the subsystem A' with signals S.sub.XA and S.sub.YA which may in fact constitute a single signal (not shown). As so driven, the first stage A' produces a signal S.sub.ZB' which is in synchronization with signal S.sub.ZB produced in element Z of subsystem A in the transmitter 600. The second stage of the cascaded receiver 700 is a subsystem B" which is a duplicate of subsystem B in the transmitter 600. It includes elements W" and X". The transmitter 600 and the first stage A' drive the second stage B" with signals S.sub.YB and SS.sub.ZB', respectively. As so driven, the second stage B" produces signals S.sub.WC" and S.sub.XC", which are synchronous with signals S.sub.WC and S.sub.XC, respectively, produced in subsystem B of the transmitter 600. The third stage C'" of the cascaded receiver 700 is a subsystem C'" which is a duplicate of subsystem C in the transmitter 600. It includes elements Y'" and Z'". The second stage B" drives the third stage C'" with signals S.sub.WC" and S.sub.XC". The receiver 700 is cascaded since the first stage A' drives the second stage B" and the second stage B" drives the third stage C'" and since the second stage B" does not directly drive the first stage A' and the third stage C'" does not directly drive the second stage B". As so driven, the third stage C'" produces signals S.sub.YA'" and S.sub.YB'" which are synchronous with signals S.sub.YA and S.sub.YB of the transmitter 600. Although not shown, the receiver 700 can produce additional signals such as S.sub.WC', S.sub.XA", and S.sub.ZB'" which are synchronous with signals S.sub.WC, S.sub.XA, and S.sub.ZB produced by the transmitter 600. The signals S.sub.YA'", S.sub.YB'" as well as S.sub.XA" produced by the receiver 700 can be compared with the corresponding signals produced by the transmitter 600 to confirm synchronization. To understand the theory behind the cascaded systems of FIGS. 9A, 9B and 10 we build on the previous discussion of equations 1-3. Once the first subsystem of the receiver is created we create a second system, say modeled by the set of differential equations r=a(r,s) and s=b(r,s), where r and s are subsets of variables of u in the same way that v and w are subsets of variables of u. The r variables are the drives for the second subsystem just as the v variables were for the first subsystem. The functions a and b are the corresponding vector field components. If this second subsystem is a stable subsystem (See Pecora et al., Synchronization in Chaotic Systems, Physical Review Letters, Vol. 64, No. 8, February 1990 and Pecora et al., Driving Subsystems With Chaotic Signals, Physical Review A, Vol. 44, No. 4, August 1991, both incorporated by reference herein, for a discussion of how to determine whether stability exists), we will have synchronization of the s variables with their corresponding variables in the first system and with the drive signal. This then provides a signal in synchronization with the input drive (one or more of the variables). For any two dynamical systems to become synchronized, they must start in the same basin of attraction. That is, their starting points (initial conditions) must be in the same set of points which will converge to the same attractor. Since many dynamical systems can have more than one attractor, it is possible for two such systems to start in different basins. If the response subsystem has somewhat different parameters than the drive system, the synchronized signals will not be exactly equal and in general will have a difference which at small parameter changes will be proportional to the derivative of the vector fields with respect to the parameters. As we discuss below, this effect along with others in the dynamical system allows communication using signals from nonlinear systems, including chaotic ones. We now discuss the details of cascaded synchronized systems and the circuit design, construction, and operation thereof. FIG. 11 functionally illustrates an example of a cascaded system. It includes a transmitter 800 which includes elements X.sub.1, X.sub.2, X.sub.3, and X.sub.4 characterized by state variables x.sub.1, x.sub.2, x.sub.3 and x.sub.4, respectively. Element X.sub.4 constitutes subsystem A, and elements X.sub.1, X.sub.2, X.sub.3 constitutes subsystem B. Both subsystems A and B are stable, that is they have all negative sub-Lyapunov exponents. Subsystem A drives subsystem B with signal S.sub.A and subsystem B drives subsystem A with signal S.sub.B. The receiver 900 is a cascade of two subsystems A' and B" where the first subsystem system A' includes a single element X.sub.4' and the second subsystem B" includes three elements X.sub.1", X.sub.2" and X.sub.3". The receiver 900 is a cascaded receiver since the first subsystem A' drives the second subsystem B" and the second subsystem B" does not directly drive the first subsystem A'. The first subsystem A' is a duplicate of the subsystem A in the transmitter 800 and the second subsystem B" is a duplicate of the subsystem B in the transmitter 800. The transmitter 800 drives the first subsystem A' with signal S.sub.B and the first subsystem A' drives the second subsystem B" with signal S.sub.A'. The second subsystem B" produces an output signal S.sub.B" in synchronization with drive signal S.sub.B. The operation of the elements in this example is modeled by the following equations: dx.sub.1 /dt=-.alpha..sub.1 [.beta..sub.1 A.sub.1 x.sub.1 -.gamma..sub.1 x.sub.2 +x.sub.3 -x.sub.4 +g.sub.1 (x.sub.4)+.delta.x.sub.1 ],(13) dx.sub.2 /dt=-.alpha..sub.2 (x.sub.1 +.delta.x.sub.2), (14) dx.sub.3 /dt=-.alpha..sub.3 (x.sub.2 +.delta.x.sub.3), (15) dx.sub.4 /dt=-.alpha..sub.4 ((-.beta..sub.4 /R.sub.v)x.sub.1 +.gamma..sub.4 A.sub.4 x.sub.4 +g.sub.2 (x.sub.4)), (16) dx".sub.1 /dt=-.alpha..sub.1 [.beta..sub.1 A".sub.1 x".sub.1 -.gamma..sub.1 x".sub.2 +x".sub.3 -x'.sub.4 +g.sub.1 (x'.sub.4)+.delta.x".sub.1 ],(17) dx".sub.2 /dt=-.alpha..sub.2 (x".sub.1 +.delta.x".sub.2), (18) dx".sub.3 /dt=-.alpha..sub.3 (x".sub.2 +.delta.x".sub.3), (19) dx'.sub.4 /dt=-.alpha..sub.4 ((-.beta..sub.4 /R.sub.v)x.sub.1 +.gamma..sub.4 A'.sub.4 x'.sub.4 +g.sub.2 (x'.sub.4)), (20) where the g.sub.1 and g.sub.2 functions are defined as: g.sub.1 (x)=.beta..sub.5 (.vertline.x-2.5.vertline.-.vertline.x+2.5.vertline.), (21) g.sub.2 (x)=.beta..sub.6 x+.gamma..sub.6 (.vertline.x-1.3.vertline.-.vertline.x+1.3.vertline.)+.epsilon.(.vertline. x-2.6 .vertline.-.vertline.x+2.6.vertline.) (22) and the constants are .alpha..sub.1 =1098, .alpha..sub.2 =10980, .alpha..sub.3 =4972, .alpha..sub.4 =10980, .beta..sub.1 =1.466, .gamma..sub.1 =2.466, .beta..sub.4 =10.sup.5, .gamma..sub.4 =0.5, .beta..sub.5 =0.5, .beta..sub.6 0.5, .gamma..sub.6 =0.164, and .epsilon..sub.6 =0.361. The constant .delta., set at 0.2, is a phenomenological damping constant used to account for leakage current in the capacitors. Its value was set to make the stability of eqns. (13)-(22) match the stability of the actual circuit. A.sub.1 and A.sub.4 are variable parameters normally set at 1.0. As R.sub.v is decreased from 50,000 ohms to 46,000 ohms, the circuit goes from a limit cycle through a period doubling to a one-well chaotic attractor to a two-well chaotic attractor. With R.sub.v held constant the transmitter 800 and receiver 900 can produce a number of synchronized signals with the output S.sub.B" of the element B" being used to confirm synchronicity as previously discussed. If R.sub.v is varied information can be transferred as will be discussed in detail with respect to FIGS. 20-27. FIGS. 12-15 illustrate the circuit details of an example of a system of FIG. 11 where multiple synchronized signals can be produced and synchronization verified. FIG. 12 depicts the details of the transmitter 800. This circuit 800 includes the following particular circuit elements:
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Resistor R1 = 100 k.OMEGA.
Resistor R11 = 221 k.OMEGA.
Resistor R2 = 100 k.OMEGA.
Resistor R12 = R.sub.v
Resistor R3 = 100 k.OMEGA.
Resistor R13 = 100 k.OMEGA.
Resistor R4 = 100 k.OMEGA.
Resistor R14 = 200 k.OMEGA.
Resistor R5 = 68.2 k.OMEGA.
Resistor R15 = 100 k.OMEGA.
Resistor R6 = 100 k.OMEGA.
Resistor R16 = 100 k.OMEGA.
Resistor R7 = 100 k.OMEGA.
Resistor R17 = 100 k.OMEGA.
Resistor R8 = 68.2 k.OMEGA.
Resistor R18 = 100 .OMEGA.
Resistor R9 = 1 M.OMEGA.
Resistor R10 = 100 k.OMEGA.
Capacitor C1 = 910 pf
Capacitor C3 = 910 pf
Capacitor C2 = 910 pf
Capacitor C4 = 910 pf.
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R.sub.v is selected from among 47.8 k.OMEGA. and 46.9 k.OMEGA. with 47.8 k.OMEGA. preferable. Resistor tolerances are preferably 1% and all capacitors are preferably 5% mica capacitors. The system also includes operational amplifiers 01, 02, 03, 04, 05, 06 and 07 all of which are 741 type amplifiers and diode DO which is an IN485B type. The circuit details of the functions g1(x) (eqn. 21) and g2(x) (eqn. 22) are depicted in the circuit diagrams of FIGS. 13 and 14, respectively. Returning now to the example shown in FIG. 12, if one cuts the circuit at points a and b, the resulting systems A and B are stable. Subsystem B consisting of X.sub.1, X.sub.2, and X.sub.3 can be driven with the S.sub.A signal from the full system. Subsystem A consisting of X.sub.4 may be driven with the S.sub.B signal from the full circuit. When driving the B subsystem including elements x.sub.1, x.sub.2, and x.sub.3, it does not actually matter whether the S.sub.A driving signal is coming from the full circuit or from an A (or A') subsystem synchronized to the full circuit. Conversely, when driving the A subsystem, it does not actually matter whether the S.sub.B driving signal is coming from the full circuit or from a B or B" subsystem synchronized to the full circuit. This arrangement, in which the stable subsystems are driven by signals from subsystems and not necessarily the full circuit, is called "cascaded synchronization". FIG. 13 depicts a circuit with response g1(x) (eqn. 21). In this circuit the resistors R=10 k.OMEGA., the operational amplifiers 08, 09, 010 and 011 are 741 types and the diodes D1, D2, D3 and D4 are preferably type IN485B. FIG. 14 depicts a circuit with response g2(x) (eqn. 22) where operational amplifiers 012 and 013 are 741 type amplifiers and
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Resistors R21 = 27.4 k.OMEGA.
Resistors R29 = 50.1 .OMEGA.
Resistors R22 = 27.4 k.OMEGA.
Resistors R30 = 50.1 .OMEGA.
Resistors R23 = 49.9 k.OMEGA.
Resistors R31 = 50.1 .OMEGA.
Resistors R24 = 49.9 k.OMEGA.
Resistors R32 = 50.1 .OMEGA.
Resistors R25 = 200 k.OMEGA.
Resistors R33 = 20 k.OMEGA.
Resistors R26 = 200 k.OMEGA.
Resistors R34 = 178 k.OMEGA.
Resistors R27 = 825 k.OMEGA.
Resistors R35 = 156.2 k.OMEGA.
Resistors R28 = 825 k.OMEGA.
Resistors R36 = 100 k.OMEGA.
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Diodes D5, D6, D7 and D8 are type IN485B. FIG. 15 depicts the circuit details of the receiver 900 of FIG. 11. In this circuit 900 the resistor, capacitor, amplifier and function components are the same as previously discussed regarding FIGS. 12-14. In FIG. 12 any of the nodes can be used as the source of the signals to be synchronized. However, the drive signal must come from a particular cut point as discussed above. The above discussion of separated system synchronization is performed with electronic hardware components or other equivalent devices. Using the same concepts, systems can also be synchronized using software. For example, a three dimensional system can be created which uses the Rikitake Two-Disc Dynamo system discussed above (see eqn. 11). FIG. 16 is a flow chart illustrating software version of this three dimensional system using the cascade principles previously discussed. The transmitter 800 and receiver 900 are implemented in separate computers, such as a pair of conventional workstations. Each machine performs the operations shown in corresponding loops where each loop is executed once for each time step. In the transmitter 800 the first step of the loop is to input 820 the output values (See block 826) of the prior cycle. These values are passed to a conventional differential equation solver package 822 which has as inputs the differential equations 824, such as equations 21-23, that control the behavior of each element and constitute a differential equation model. The solver produces outputs 826 one of which (x(t)) is broadcast to the receiver 900. The receiver 920 inputs the broadcast signal or value and uses the signals x(t) or values produced in the output (See block 926) of a previous cycle, and it updates the value of t, i.e., t+.DELTA.t.fwdarw.t. These values are passed to a conventional differential equations solver package 922 which uses the equations from the two differential equation model subsystems 924 and produces the synchronized drive value as well as other synchronized values as desired. FIG. 17 illustrates another embodiment of the software version shown in FIG. 16 except that the system is three dimensional and uses conventional iterated functions 828 and 928, often called maps, substituted for the differential equations and solver in FIG. 16. We will now discuss how the system of FIG. 11 can be modified for information transfer or communication. Cascaded synchronization as discussed earlier is quite useful for secure communications. One may consider sending an S.sub.B signal from the full system with an information signal "mixed-in", such as by modulation or by parameter variation. Referring now to FIGS. 18 and 19, a drive signal S.sub.tr transmitted from the transmitter 800 to the receiver 900 may include information from an information signal S.sub.I or from variation of a parameter 850. Referring now to FIG. 18, a modulator 840 modulates signal S.sub.B with the information signal S.sub.I to produce a transmitted signal S.sub.tr. The modulation may be linear (addition) or nonlinear, such as multiplication. The transmitted signal S.sub.tr drives the receiver 900. Since the transmitted signal S.sub.tr is not the same as a signal S.sub.B which would be produced by the nonlinear system 800, the receiver 900 produces a signal S.sub.B" which differs from the transmitted signal S.sub.tr and does not synchronize with it over time. An error detection circuit 960 compares response signal S.sub.B" with the transmitted signal S.sub.tr to produce an error signal S.sub.err indicative of the information contained in the information signal S.sub.I. If the modulator 840 is nonlinear, it may not be possible for the receiver 900 to recover the signal S.sub.B produced by the transmitter 800 and modulated by the modulator 840. As shown in FIG. 20, the error detector 960 can perform simple subtraction. In that example, the resistors R=10 k.OMEGA. and the operational amplifier 014 is a 741 type. The error detector 960 can also strobe the output of the response S.sub.B" with the drive signal S.sub.tr and average the strobed values to produce a resulting averaged signal proportional in magnitude and sign to the original information signal S.sub.I. Other examples of methods for the error detection circuit 960 to compare response signal S.sub.B" with the transmitted signal S.sub.tr to produce an error signal S.sub.err that can be used with the present invention are related to standard phase detection techniques generally used for periodic linear systems. Referring now to FIG. 19, an information transfer system is shown in which the value of a parameter 850 is varied in the transmitter 800 but the corresponding parameter 950 in the receiver 900 is not varied. Signal S.sub.B denotes the signal that the transmitter 800 would produce if the transmitter 800 used the same parameter 850 as the parameter 950 in the receiver. The transmitter 800 produces a broadcast signal S.sub.Bp =S.sub.tr which is a chaotic signal modified by the parameter variation. Receiver 900, using subsystems A' and B" (duplicates of subsystems A and B in transmitter 800) produces a chaotic signal S.sub.B". An error-detector 960 compares the signal S.sub.B" with the broadcast signal S.sub.tr and produces an error signal S.sub.err. In this situation the parameter 850 could be a resistor such as R12 in FIG. 12. In such a situation a variable resistor would be substituted for the fixed resistor shown in FIG. 12. The corresponding parameter 950 in the receiver 900 is fixed, that is, R12 is not a variable resistor in the receiver 900. The output S.sub. err produced by the error 960 is called an error signal rather than the information signal because the change in the drive signal S.sub.Bp caused by changes in the parameter 850 may be nonlinear. However, if binary information is to be transmitted and the parameter 850 is switched between two values the error signal S.sub.err produced by error detector 960 will be a binary waveform that matches the parameter variation, although the magnitude of the signals may not match. FIG. 21A illustrates an embodiment like FIG. 20 implemented in software using differential equations and a differential equations solver for which iterated functions (maps) could be substituted, as shown in FIG. 21B, if desired. In the differential equations in the transmitter 800 the parameter 850 is modified responsive to the information signal. For example, in equation 13 the constant A.sub.1 of the x1 term is converted into a variable that changes responsive to the input signal. In the receiver 900 the corresponding parameter 950 is fixed. The receiver 900 includes a comparison operation 930 that corresponds to the error detector 960 of FIGS. 18-20. FIG. 22 illustrates a further version of the parameter variation embodiment. In this example, as the parameter 850 is varied in the transmitter 800 an error detection circuit 960 in the receiver 900 produces an error signal that changes the corresponding parameter 950 in the receiver 900. That is, in this embodiment the parameters 850 and 950 are both variable. During operation the receiver 900 produces the S.sub.B" drive signal based on the previous value of the parameter which differs from the current S.sub.tr drive signal. The difference or error indicates the direction (and how much) the parameter in the receiver needs to be modified to bring the signals into exact synchronization. The parameter is modified by the output S.sub.err of the error detection circuit 960. Referring now to FIGS. 23 and 24, when implementing this version in the circuit of FIGS. 12-15, modulators 860 and 962 are added to the transmitter 800 and receiver 900, respectively, both modulators 860 and 962 being, for example, analog multipliers type AD632. FIGS. 25 and 26 illustrate the details of an error detection circuit 960 which performs a conventional averaging phase detection operation. The information-containing drive signal S.sub.tr generated by the transmitter 800 is applied to an amplifier 964 with a high gain (FIG. 25), such as a 741 type amplifier. The output of the amplifier 964 is applied to a conventional comparator 966, such as a AD 790. The comparator 966 produces an output when the input signal is greater than zero. The positive going signal triggers a conventional Schmitt trigger circuit 968, such as SN 74121. The input signal S.sub.tr from the transmitter 800 is also applied to a conventional invertor 972 the output of which is applied to a conventional adder 974, such as a 741 type amplifier. The adder 974 also receives the signal internally generated in the receiver 900. The output of adder 974 is amplified by a conventional amplifier 976, such as a 741 type, and applied to the signal input of a conventional sample and hold circuit 970, such as an LF 398, and the output of the Schmidt trigger circuit 968 is applied to the logic input of the sample and hold circuit 970. The sampled signal produced by the sample and hold circuit 970 is applied to a conventional invertor 978, such as a 741 type amplifier and the signal is then applied to a conventional adder 980, such as 741 type amplifier. The adder 980 accumulates the sampled signal and an intermediate error signal S.sub.errint. The intermediate error signal S.sub.errint is produced by a conventional integrator 982, such as type 741 amplifier with a mica capacitor used for feedback, that averages the output of the adder 980. As illustrated in FIG. 26 the intermediate error signal S.sub.erint is applied to another conventional adder 984, such as a type 741 amplifier. The adder 984 also receives a feedback signal S.sub.err and applies its output to a first conventional sample and hold circuit 986, such as an LF 398, which samples the signal responsive to a first timing signal S.sub.T1 from a timing circuit 988. The timing circuit also produces a second timing signal S.sub.T2 completely out of phase with the first timing signal and which causes a second sample and hold circuit 1000 to hold the output of the first circuit 986. The output S.sub.err of the sample and hold circuit 1000 drives the analog modulator 962 of the second stage B" of the cascaded receiver 900 (FIG. 24). The error detection circuit 960 causes the receiver system to operate somewhat like a phase locked loop with the error signal tracking the information signal. Any circuit 960 which averages the phase difference between signal S.sub.tr and S.sub.B" could be readily substituted for the error detection circuit 960 shown in FIGS. 25 and 26. FIG. 27A depicts an embodiment similar to that of FIG. 22 that is implemented in software using differential equations and a differential equations solver for which iterated functions (maps) could be substituted, as shown in FIG. 27B, if desired. In this case the system replaces the subtraction operation 930 of FIG. 21 with a comparison operation 932 and a parameter determination operation 934 which together determines how much to vary the parameter and thus track the original information signal. These circuits perform the operation of equation (8) when equation (8) is inverted. Of course the conventional differential equation solver and the differential equations of this embodiment can have an iterated function substituted for them. The foregoing descriptions of the preferred embodiments are intended to be illustrative and not limiting. It will be appreciated that numerous modifications and variations can be made without departing from the spirit or scope of the present invention.
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