Common control audio decryptor

Abstract

Decryption of a plurality of simultaneously received, randomly phased signals is realized by employing a single data encryption standard module in a time shared manner. A plurality of process state counters, each of which is associated with a received signal, are employed to direct operations of the decryptor on a time shared basis. These operations include the generation on a time shared basis of so-called plain text data for each received signal, generation of corresponding encryption requests, and generation of cipher text data for each received signal which is used to decrypt associated received signal samples.

Claims

What is claimed is:

1. Apparatus for simultaneously decrypting a plurality of randomly phased received signals, each of the received signals including signal samples and corresponding decipherment control bits, the apparatus for decrypting comprising,

first common time shared means responsible to encryption requests and utilizing supplied blocks of plain test data associated with said requests and an encryption key code for generating corresponding blocks of cipher text data,

second common time shared means responsive to the decipherment control bits from each of the plurality of received signals for obtaining said blocks of plain text data corresponding on a one-to-one basis to each of the plurality of received signals and for generating said corresponding encrypton requests,

third common time shared means controllably utilizing said blocks of cipher text data for decrypting the associated ones of said received signals, and

a plurality of process state counters each associated on a one-to-one basis with a corresponding one of said plurality of received signals for directing operation of said second and third common time shared means in accordance with prescribed operations identified by the state of a decipherment control bit stream formed by the decipherment control bits of said corresponding one of the received signals.

2. The apparatus as defined in claim 1 wherein said prescribed operations include identifying decipherment control bits as either a framing bit, parity bit or plain text data bit, assemblying plain text data, generating plain text encryption requests, and selection of cipher text data portion to be used for decryption.

3. The apparatus as defined in claim 1 wherein said third common time shared means includes means for selecting a prescribed portion of the block of cipher text data associated with a received encrypted signal sample and means for combining said encrypted signal sample and said selected portion of cipher text data to reconstruct a decrypted signal sample.

4. The apparatus as defined in claim 3 wherein said combining means includes means for Exclusive ORing bits of said cipher text data portion and bits of said encrypted signal sample.

5. The apparatus as defined in claim 3 wherein said decipherment control bits include parity bits in predetermined bit locations in the decipherment bit streams and wherein said third common time shared means further includes means for generating a parity bit from the decrypted signal sample, means for comparing said generated parity bit with a corresponding received parity bit to generate a mute control signal when a miss-match occurs, and means responsive to said mute control signal for muting said corresponding decrypted signal sample.

6. The apparatus as defined in claim 1 wherein said decipherment control bits corresponding to each of said received signals includes plain text data information bits in prescribed bit locations, and wherein said second common time shared means includes means for obtaining said plain text data information bits from currently received decipherment control bits, first means for storing said currently obtained plain text data information bits, and second means for storing the plain text data information bits obtained during the last previous block of received decipherment control bits.

7. The apparatus as defined in claim 6 wherein each of said process state counters associated with each of said encrypted received signals includes a plurality of bit locations including a most significant bit location to a least significant bit location, and further including means for obtaining bits in a predetermined number of the most significant bit locations of said processor state counters, said bits representing a first portion of a block of plain text data, means for obtaining a predetermined code including a predetermined number of the least significant bits in predetermined ones of the least significant bit locations of said process state counters which code represents a second portion of said plain text data, and third means having a predetermined number of storage locations for storing said first and second portions of said plain text data in prescribed ones of said storage locations.

8. Apparatus as defined in claim 7 wherein said second common time shared means further includes means responsive to predetermined states of said processor state counters for generating corresponding ones of said encryption requests.

9. The apparatus as defined in claim 3 wherein said cipher text data block portion selecting means includes means responsive to predetermined states of said process state counters for selecting portions of the cipher text data block associated with samples of the individual ones of the corresponding received signals.

10. The apparatus as defined in claim 9 wherein each block of said cipher text data includes a predetermined number of bits greater than and in a prescribed relationship to a number of bits in said received signal sample.

11. The apparatus as defined in claim 10 wherein said predetermined relationship is that the number of cipher text data bits is an integer multiple of said number of received signal sample bits.

12. The apparatus as defined in claim 1 wherein said first common time shared means includes first means for storing a currently generated block of cipher text data in response to a corresponding one of said encryption requests and second means for storing a block of cipher text data generated in response to a last previous corresponding one of said encryption requests.

13. The apparatus as defined in claim 12 wherein said third common time shared means includes means responsive to the state of an associated process state counter for selecting a prescribed portion of said cipher text data from said first common time shared means second cipher text data storage means, and means for combining said selected portion of said cipher text data and said encrypted signal sample to reconstruct a decrypted signal sample.

14. The apparatus as defined in claim 13 wherein said decipherment control bits corresponding to each of said received signals includes plain text data information bits in prescribed bit locations, and wherein said second common time shared means includes means for obtaining said plain text information bits from currently received decipherment control bits, first means for storing said currently obtained plain text data information bits, and second means for storing the plain text data information bits obtained during the last previous block of received decipherment control bits.

15. The apparatus as defined in claim 14 wherein each of said process state counters associated with each of said encrypted received signals includes a plurality of bit locations including a most significant bit location to a least significant bit location, and further including means for obtaining bits in a predetermined number of the most significant bit locations of said processor state counters, said bits representing a first portion of a block of plain text data, means for obtaining a predetermined code including a predetermined number of the least significant bits in predetermined ones of the least significant bit locations of said process state counters which code represents a second portion of said plain text data, and third means having a predetermined number of storage locations for storing said first and second portions of said plain text data in prescribed ones of said storage locations.

16. Apparatus as defined in claim 15 wherein said second common time shared means further includes means responsive to predetermined states of said processor state counters for generating corresponding ones of said encryption requests.

17. The apparatus as defined in claim 1 wherein said decipherment control bits associated with each of said received signals includes framing bits in prescribed bit locations in a block of said decipherment control bits, said framing bits being in a predetermined framing pattern, and wherein said second common time shared means includes means for comparing the bits in said framing bit positions in the block of decipherment control bits to said framing bit pattern, and means for decrementing the count of said associated process state counter to search for said framing pattern when said comparing means yields an indication that a mis-match has occurred.

Description

RELATED APPLICATIONS

U.S. patent application Ser. No. 545,206, now U.S. Pat. No. 4,531,024 issued July 23, 1985 Ser. No. 545,761, now U.S. Pat. No. 4,529,840 issued July 16, 1985, Ser. No. 545,461, now U.S. Pat. No. 4,529,639 issued July 16, 1985, Ser. No. 545,363 and Ser. No. 545,162, were filed concurrently herewith, concurrently herewith.

TECHNICAL FIELD

This invention relates to decryption of audio information and, more particularly, to the decryption of a plurality of audio channels using common control techniques.

BACKGROUND OF THE INVENTION

Heretofore, audio encryption/decryption has been done on a per channel basis. Consequently, when a plurality of channels are used a corresponding plurality of encryption/decryption modules was required. Each of the encryption/decryption modules includes an integrated circuit chip set that implements the Data Encrytion Standard (DES) promulgated by the National Bureau of Standards as described in the "Data Encryption Standard", Federal Information Processing Standard (FIPS) Publication, No. 46, February, 1977. Thus, for a plurality of audio channels a corresponding plurality of the DES chip sets was required to perform decryption along with any associated apparatus.

Futhermore, in some encryption/decryption arrangements the decryptor must be synchronized with an associated encryptor. This synchronization is typically achieved by employing a separate synchronizing signal for each encryptor/decryptor pair. When using such synchronization signals in a digital system decoding of the signals is required which, in turn, requires additional apparatus for each channel.

Additionally, in certain systems it is desirable to perform checks on the encrytion/decryption and transmission processes for possible errors. This is usually realized by generating error control information prior to encrypting the audio signal which is transmitted separately for each of the channels. Then, the decryptor must regenerate the error control information and compare it to the transmitted error check information in order to detect any errors. Again, this is typically done on a per channel basis.

Consequently, all of these functions have required the use of duplicate apparatus for each channel which is costly and, therefore, undesirable.

SUMMARY OF THE INVENTION

Decryption of a plurality of simultaneously received, randomly phased encrypted signals is efficiently obtained, in accordance with an aspect of the invention, by employing a common control process. The common control process utilizes in a time shared manner a single encryption module in association with a plurality of process state counters. The state counters are each associated with one of the plurality of received signals and direct on a time shared basis the decryption operations for the associated received signal. The decryption module generates a block of so-called cipher text data that is used to decrypt signal samples for an associated one of the received signals. This operation takes only a fraction of a received signal sample period and, therefore, the decryption module can be time shared to generate blocks of cipher text data for simultaneously decrypting samples of the other received signals.

More specifically, decryption of a plurality of simultaneously received, randomly phased signals is achieved by employing a single data encryption standard (DES) module on a time shared basis under control of a digital controller. The digital controller causes received signal samples and corresponding synchronization information for the plurality of simultaneously received, randomly phase signals to be stored in allocated memory locations assigned to the individual received signals. Additionally, the digital controller operates on a time shared basis on the received synchronization information for each received signal to generate so-called encryption requests for each received signal along with blocks of corresponding so-called plain text data which are also stored in memory locations allocated to the individual received signals to be decrypted. Then, the single DES module is employed on a time shared basis as an operator on each of the blocks of stored plain text data to generate a corresponding plurality of blocks of cipher text data. The blocks of cipher text data are also stored in memory locations allocated to the individual received signals and, then, added modulo-2 on a time shared basis to bits of the stored received signal samples to yield corresponding decrypted signal samples.

In one embodiment of the invention, the number of bits in a block of cipher text data is greater than and in a prescribed relationship to the number of bits in a received signal sample. This relationship further facilitates using the single DES module on a time shared basis to generate blocks of cipher text data for a plurality of simultaneously received, randomly phased signals.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be more fully understood from the following detailed description of an illustrative embodiment taken in connection with the appended figures in which:

FIG. 1 shows in simplified block diagram form a system arrangement including a Multilocation Conference Terminal (MLCT) incorporating an embodiment of the invention;

FIG. 2 depicts the VTS signal data format used in the system of FIG. 1;

FIG. 3 illustrates the cross connect frame format used in the system of FIG. 1;

FIG. 4 shows in simplified block diagram form details of microprocessor system 101 employed in the system of FIG. 1;

FIG. 5 depicts in simplified block diagram form details of transmission facility interface 104 used in the system of FIG. 1;

FIG. 6 shows in simplified block diagram form details of cross-connect 102 employed in the system of FIG. 1;

FIG. 7 illustrates in simplified block diagram form details of time multiplexed switch 601 used in cross-connect 102 of FIG. 6;

FIG. 8 shows in simplified block diagram form details of N.times.N switch 602 used in cross-connect 102 of FIG. 6;

FIG. 9 illustrates the cross-connect 102 audio and video time slot assignments utilized in effecting an aspect of the invention;

FIG. 10 shows in simplified block diagram form details of bridge 103 used in the system of FIG. 1;

FIG. 11 depicts in simplified block diagram form details of bridge input circuit (BOC) 1001 used in bridge 103 of FIG. 10;

FIG. 12 illustrates the output frame format of the audio encryption process which is useful in describing aspects of the invention;

FIG. 13 illustrates timing diagrams useful in describing the encryption and decryption process;

FIG. 14 shows in simplified block diagram form details of audio decryptor (DEC) 1002 used in bridge 103 of FIG. 10;

FIG. 15 illustrates a flowchart of the decryptor program routine for the common operation of decryptor 1002 to controllably decrypt the incoming audio and control information of bridge 103;

FIGS. 16, 17, 18 and 19 when connected as shown form a flow chart of the PADEC sub-routine used in the decryptor routine of FIG. 15;

FIGS. 20 and 21 connected as shown form a flow chart of the CENCHR sub-routine used in the decryptor routine of FIG. 15;

FIG. 22 shows in simplified block diagram form details of audio bridge 1003 employed in bridge 103 of FIG. 10;

FIGS. 23, 24, 25 and 26 when connected as shown form a flow chart of a program routine for controllably operating DSP 2201 in audio bridge 1003 of FIG. 22;

FIGS. 27, 28, 29 and 30 when connected as shown form a flow chart of a program routine for controllably operating DSP 2202 in audio bridge 1003 of FIG. 22;

FIG. 31 is a flow chart of a DSP control (DSPCTL) program task for operating host processor 2203 to interact with digital signal processors (DSPs) 2201 and 2202 in audio bridge 1003 of FIG. 22;

FIG. 32 is a flow chart of a noise guard program (NGRD) sub-routine used in the DSPCTL program task of FIG. 31;

FIG. 33 shows in simplified block diagram form details of audio encryptor (ENC) 1004 employed in bridge 103 of FIG. 10;

FIGS. 34, 35 and 36 when connected as shown form a flow chart of program routine ESCVC to effect common control of the mixed audio information from audio bridge 1003;

FIG. 37 is a flow chart of the PAENC sub-routine used in the ESCVC program routine of FIGS. 34, 35 and 36;

FIG. 38 depicts in simplified block diagram form details of bridge output circuit (BOC) 1005 used in bridge 103 of FIG. 10;

FIG. 39 shows in simplified block diagram form details of control processor (CP) 1006 used in bridge 103 of FIG. 10;

FIG. 40 is a flow chart of program routine XPCTL for operating control processor 1006 of FIG. 39 to control communications to audio decryptor 1002, audio bridge 1003 and audio encryptor 1004;

FIG. 41 is a flow chart of sub-rountine PREST used in the XPCTL program routine of FIG. 40;

FIGS. 42, 43, 44 and 45 when connected as shown form a flow chart of the PRNLA sub-routine employed in the XPCTL program routine of FIG. 40;

FIG. 46 is a flow chart of the PRDENT sub-routine employed in the XPCTL program routine of FIG. 40;

FIG. 47 illustrates the relationship among the program tasks that perform the video selection algorithm and the fast update algorithm;

FIGS. 48, 49 and 50 when connected as shown form a flow chart of steps performed in the new talker process (NTP) task by control processor 1006 of FIG. 39;

FIG. 51 is a flow chart of the CONTEND sub-routine used in the NTP program task of FIGS. 48, 49 and 50;

FIG. 52 is a flow chart of the NTSAVE sub-routine used in the NTP program task of FIGS. 48, 49 and 50;

FIGS. 53, 54, 55 and 56 when connected as shown form a flow chart of the steps performed in the new graphics process (NGP) program task by control processor 1006 of FIG. 38;

FIG. 57 is a flow chat of the GRACK sub-routine used in the NGP program task of FIGS. 53, 54, 55 and 56;

FIGS. 58 and 59 when connected as shown form a flow chart of the steps performed in the video selection (VSEL) program task by control processor 1006 of FIG. 39;

FIGS. 60 and 61 when connected as shown form a flow chart of the steps performed in the fast update generator (FUGEN) program task by control procesor 1006 of FIG. 39;

FIGS. 62 and 63 when connected as shown form a flow chart of the steps performed in the fast update monitor (FUMON) program task by control processor 1006 of FIG. 39;

FIGS. 64 and 65 when connected as shown form a flow chart of the steps performed in the video switch (VSWCH) program task by control processor 1006 of FIG. 39; and

FIG. 66 is a flow chart of the SWITCHLK sub-routine used in the VSWCH program task of FIGS. 64 and 65; and

FIGS. 67 and 68 when connected as shown form a flow chart of steps performed in facility administrator (FADMIN) program task by control processor 1006 of FIG. 39.

DETAILED DESCRIPTION

General

The Multilocation Conference Terminal, hereinafter referred to as MLCT, is employed to establish and control a multilocation audiovisual teleconference in a Video Teleconferencing Service, hereinafter referred to as VTS, for conferences involving a plurality of VTS conference rooms. Accordingly, FIG. 1 shows in simplified block diagram form a system arrangement including a plurality of MLCT's, namely, MLCTs 1 through Y and a plurality of conference rooms, namely, rooms 1 through M, which may be controllably interconnected via the MLCT's and transmission facilities 10. Each of MLCTs 1 through Y includes a plurality of VTS communication ports, associated with data links 106-1 through 106-N, for interconnecting up to N rooms via transmission facilities 10. Transmission facilities 10 include both terrestrial communication channels and/or satellite channels. Additionally, facilities 10 also include arrangements for interconnecting one or more of the conference rooms, i.e., conference locations, to an associated MLCT for establishing a conference. These connections may be established manually or via switching apparatus, for example, a digital cross connect arrangement. When satellite channels are deployed a multiplicity of MLCTs are used to reduce the number of end-to-end satellite hops to a maximum of one. In the satellite mode of operation, the MLCTs form a distributed conferencing control structure.

A number of conference configurations are realizable including one or more MLCTs. For example, a single MLCT may be used to include up to N=6 rooms in a conference over either local or long-haul terrestrial communication facilities. While it is possible to use only one MLCT in an all terrestrial conference, it is not necessary to do so. Two MLCT's can be connected terrestrially, allowing savings of transmission facilities. In a mixed satellite/terrestrial conference network, distributed conferencing is used with a MLCT being associated with each satellite earth station. Satellite and terrestrial connections remain unchanged during an ungoing conference.

Each of MLCTs 1 through Y provides a time-space-time switching function and includes microprocessor system 101, digital cross connect 102, bridge 103, transmission facility interface 104 and a plurality of data terminal ports 105-1 through 105-T. Data terminals may be connected to data terminal ports 105-1 through 105-T for manually providing teleconference setup information including VTS port assignment and other information needed for the ongoing conference. Where an operations support system or other reservation service computer is available, the data terminal ports are used to connect the MLCT thereto for carrying out the necessary conference setup and maintenance procedures.

As described hereinafter each MLCT provides audio mixing and video switching of encrypted digital VTS signals which are supplied via VTS ports and data links 106-1 through 106-N, respectively, to transmission facilities 10 and, in turn, to associated ones of rooms 1 through M and/or to another MLCT. In this example, each MLCT includes six (6) VTS ports, i.e., N=6.

Each of conference rooms 1 through M includes known audio and video equipment. For example, each room includes video monitors and cameras 120, speakers and microphones 121, audio detectors 122, picture processor 123, room controls 124 and room controller 125. Rooms substantially identical to rooms 1 through M are presently commercially available for point-to-point audiovisual conferences. Room controller 124 is arranged to respond to an auxiliary control channel signal in the VTS signal from an associated MLCT for controlling picture processor 123 in accordance with aspects of the invention as will be described below. Picture processor 123 is commercically available from Nippon Electric Corporation and is described in Western Electric Company KS-22456 specification. U.S. Pat. No. 3,601,530 discloses a video conference arrangement using voice-switched cameras in a conference room. Further details of the point-to-point conference room are broadly described in an article by Mr. Bernard A. Wright entitled, "The Design and Provisions of PICTUREPHONE Meeting Service (PMS) Conference Centers for Video Teleconferencing", in the IEEE Communications Magazine, pages 30-36, March 1983. Also see an article by Audrey J. Kames and W. Gordon Heffron entitled, "Human Factors Design of PICTUREPHONE Meeting Service" in GLOBECOM '82 Conference Record, Volume 3, pages 976-981, November 1982 for a broad overview of the commercially available point-to-point video teleconferencing service.

As indicated above, the MLCTs are interconnected via transmission facilities 10 to associated ones of rooms 1-M and/or another one of the MLCTs through VTS ports 501-1 through 501-N (FIG. 5) and data links 106-1 through 106-N, respectively. The VTS signals are transmitted over one or more time division multiplexed channels, for example, T1 lines, depending on the data rate being employed. In this example, the data rates are selectable at 1.544, 3.088 or 6.176 Mb/sec. In a specific embodiment, two T1 lines are used having the 3.088 Mb/sec data rate with each T1 line having an incoming data link and an outgoing data link. The VTS data format is shown in FIG. 2. One of the T1 lines, designated DS-1 No. 1 carries encoded audio and control channels in addition to video data. The other T1 lines, designated DS-1 No. 2 through DS-1 No. 4 carry only video data. The T1 lines do not have standard DS-1 formats except for framing bits Ft.

The format for DS-1 No. 1 is a combination of three groups of information; one associated with the video signal; another with audio; and another with the control data channel. The control group consists of a single C-bit per frame located in word 1 bit 4, as shown in FIG. 2. The C-bit implements an 8 Kb/sec data link between the MLCT and the remote location communicating to it, i.e., either a room or another MLCT. The audio group consists of 16 audio bits, A.sub.1 to A.sub.16, a D-bit, as well as "1"s in the shown bit positions, all within the first three words of DS-1 No. 1. The A-bits represent two samples per frame of mu-255 coded audio. Bits A.sub.1 through A.sub.8 are audio bits belonging to a first sample of the audio signal. Bits A.sub.9 through A.sub.16 are audio bits belonging to the second sample of the audio signal. The audio may be encrypted or transmitted "on the clear". The D-bit is used for synchronization of the audio encryptor 1004 and decryptor 1002 described below.

The first three words of the DS-1 No. 1 contain fixed "1"s in the shown position to maintain the required "1"s density these words for all possible codes transmitted. The remaining bits in DS-1 No. 1, i.e., F.sub.D, X, X, and those of DS-1 No. 2 through DS-1 No. 4 contain video information. The MLCT does not process these remaining bit locations aside from maintaining their relative position throughout its switching function. Indeed, except for the information included in the C-bit position, the VTS data format is essentially identical to that employed in the existing point-to-point teleconferencing service available through American Telephone and Telegraph Company.

MLCT Operation-General

A Multilocation Conference Terminal (e.g., MLCT1, FIG. 1) located in a Video Teleconferencing Service (VTS) is connected via transmission facilities 10 to conference locations, i.e., rooms and other MLCTs dependent on the conference being set up.

The MLCT is always in one of the following modes:

Standby (SBY)--In the standby mode the MLCT is not processing a conference. It is continually performing internal diagnostics to ensure that it is fully operational.

Sender's Choice (SC)--A MLCT in the SC mode is set up to operate a SC conference.

Viewer's Choice (VC)--A MLCT in the VC mode is set up to operate a VC conference.

No MLCT mode changes are allowed while the MLCT is processing a conference. To change modes the MLCT must first be removed from the conference.

The steps to set up the MLCT for a conference are as follows:

1. Enter command(s) into the MLCT through an input terminal connected to one of input ports 105-1 through 105-T to place it in the desired mode for the conference (VC,SC) and to define the MLCT's ID in the conference.

2. Setup transmission connections to the MLCT required for the conference.

3. Enter command(s) into the MLCT to assign the VTS ports as either:

a. connected to a room (specify room ID).

b. a broadcast link (outgoing transmission path to all other MLCTs in the conference) and/or a MLCT link (incoming transmission path from another MLCT, specify that MLCT's ID).

Once these steps are completed the conference is in progress and the MLCT will automatically set up and maintain communications with its serving rooms, i.e., rooms associated to it, and other MLCTs.

If communication over a VTS port connected to a room, e.g. room I, is lost (or is never established in the first place) the MLCT operates the conference without room I. No other room can view room I. The audio transmitted by room I is not muted unless audio decryptor 1002 (FIG. 10) detects a facility failure in the audio signal incoming from room I. The video transmitted to room I is selected by assuming that room is in the automatic video switching (AVX) mode. Thus, room I essentially becomes a spectator. Room I views a new talker room or a new graphics room as described below. The other room hear room I if its audio signal is not muted, by they cannot view room I.

If communication over a broadcast link or MLCT link is lost (or is never established in the first place) the MLCT operates a conference for only the rooms that it serves.

Configuration changes to a conference already in progress are realized as follows:

1. If any of the MLCT's room, broadcast, or MLCT links are to be removed, then:

a. Command(s) must be entered into the MLCT that unassign those links.

b. The port connections to be removed are taken down.

2. If any room, broadcast, or MLCT links are to be added to the conference, then:

a. The port connections just assigned are set

b. Command(s) must be entered into the MLCT to assign each new port as connected to a room or as a broadcast link and/or MLCT link.

Any number of configuration changes can occur during a conference.

The microprocessor system (MS) 101 (FIG. 1) maintains control of the MLCT. Commands are entered through the links 105-1 through 105-T into the MS 101. The MS 101 interprets these commands and issues signals to set up the other components of the MLCT. The MS 101 is responsible for downloading the proper program code into bridge 103 when any MLCT mode change is performed and for informing the bridge on all the conference attributes (MLCT's ID and link assignments). MS 101 cannot communicates directly with other MLCTs or any room controllers.

Bridge 103 computes the weighted sums of the audio signals, receives the control signals that come over the incoming links from the rooms and other MLCTs, generates the control signals that are transmitted to the rooms and other MLCTs, signals MS 101 to execute video switches, and monitors the links to detect facility failures in the control and audio signals.

MS 101 and bridge 103 interact during a conference to perform two primary functions. Bridge 103 directs MS 101 to perform switching of the video signals. MS 101 and bridge 103 keep each other informed of link failures.

Cross-connect 102 and transmission facility interface 104 provide bridge 103 with audio and control signals, receive conferenced audio and control signals from bridge 103 and perform the switching of the video signals under the control of the MS 101.

The MLCT can be in one of three modes (SBY, SC, or VC) as described above. Bridge 103 can be in one of four states. Three of the bridge states correspond to the MLCT modes (SBY, SC, and VC). Bridge 103 enters the fouth state, called the kernel state, while MS 101 is downloading a new program code. The MLCT's mode and bridge state are set up prior to the start of the conference and do not change while the conference is in progress. By definition the MLCT mode and bridge state during a conference must be the same, either sender's choice or viewer's choice.

When the conference is first initiated, bridge 103 comes up in the stand alone (SA) condition. In the SA condition bridge 103 operates a conference for just its serving rooms.

When the bridge verifies that all of its broadcast links and MLCT links are active, it assumes the distributed (DS) condition. In the DS condition the bridge will operate in the conference with other MLCTs. The conference messages are exchanged with the other MLCTs. If the MLCT is in the DS condition and one of its broadcast or MLCT links become inactive, bridge 103 assumes the SA state again.

If the bridge has communication with the other MLCTs it will notify them of its DS/SA condition transitions by transmitting an MLCT status (MSTAT) message specifying the condition (DS,SA) it has assumed.

The MLCT will try to operate the conference as set up by the commands entered through MS 101. At the initialization of the conference the MLCT mode (VC,SC) and MLCT's own ID are specified before any links are assigned. MS 101 will have already downloaded the program code for the required bridge state into bridge 103. Bridge 103 starts up in the SA condition in the mode specified (VC,SC) with all ports unassigned.

1. MS 101 communicates with bridge 103 to assign a port to a room (MS specifies room ID) or assign a port's in-link, i.e., an incoming transmission path, as a MLCT link (MS specifys MLCT ID) and/or assign the port's out-link, i.e., an outgoing transmission path, as a broadcast link.

2. Bridge 103 marks the in and/or out link as assigned, inactive, and muted.

a. If the port is assigned to a room bridge 103 marks that room assigned.

b. If the in link is assigned to an MLCT bridge 103 marks that MLCT assigned.

3. Bridge 103 tries to establish communications over the links. If communication is established the link is marked active 4. If decryptor 1002 (FIG. 10) detects no facility failure in the audio signal of the assigned incoming link, bridge 103 unmutes the audio signal and marks the in link as unmuted.

Any subsequent command entered through one of the MLCT's administrative links that declares link(s) to be assigned will be accepted only if it does not reassign links that are presently assigned. All of these subsequent commands are executed (if they are accepted) in the same manner as the first command that assigned links in the conference.

Any subsequent command entered through one of the MLCT's administrative links that declares as in link and/or out link to be unassigned will be accepted only if that in link and/or out link is presently assigned. MS 101 communicates with bridge 103 to update the bridge's link assignments. Bridge 103 does the following:

1. Mark the specified links as unassigned.

2. If any links being marked unassigned were assigned to rooms, mark those rooms as unassigned.

3. If the last MLCT link assigned to another MLCT, MLCT J, is being marked unassigned, then:

a. MLCT J is marked unassigned.

b. All rooms served by MLCT J are marked unassigned.

Any link or room that is marked unassigned is automatically marked inactive and muted.

While the MLCT is involved in a conference (i.e., some links are assigned), no command entered into the MLCT that specifies changing either the MLCT mode or MLCT's own ID will be accepted.

Broadcast links are dedicated to ensure that the MLCT will be able to transmit any of the required combination of video signals to the other MLCTs. At the time of the conference set-up, the MLCT decides how to dedicate each of its broadcast links. The dedication of these broadcast links will not be changed unless the conference setup is changed.

In a Viewer's Choice conference, MLCTs may need more than one broadcast link. The push-to-see (PTS) mode requires that MLCTs be able to transmit any combination of video signals to the rooms. In a Viewer's Choice conference the broadcast links are dedicated according to the following priorities:

1. If the MLCT has enough broadcast links it assigns a broadcast link to each of its serving rooms. In this case all of the other MLCTs always receive video from every room served by this MLCT.

2. If the MLCT has enough broadcast links it assigns a broadcast link to each of the rooms served by another MLCT. In this case the MLCT will always be able to transmit the video required for each of the rooms served by other MLCTs.

3. If the MLCT does not have enough broadcast links to satisfy either of two previous cases, then the MLCT does not have enough broadcast links to operate properly in the conference. In this case the MLCT prints a warning message.

If the MLCT has more than enough broadcast links needed for dedication to the rooms, then it marks the remaining broadcast links as undedicated.

In a Sender's Choice conference each MLCT requires only one broadcast link. This broadcast link is not dedicated.

Returning to MLCT FIG. 1, there is shown MLCT1 including microprocessor system (MS) 101, digital cross connect 102, bridge 103 and transmission facility interface 104 which are interconnected as shown by a multiplicity of data and control paths in order to perform required multilocation audio video teleconferencing functions.

Microprocessor System (MS)

The MLCT microprocessor system (MS) 101 is shown in simplified block diagram form in FIG. 4. Shown are CPU 401, memory 402, back-up memory 403, peripheral interface 404 and communications interface 405 all interconnected via bus 406. Memory 402 includes program storage in ROM and data storage in RAM. Back-up memory 403 stores data pertaining to conference set-up in a nonvolatile storage such as bubble memory in order to maintain conference set-up information integrity in the event of a short-time power outage to eliminate the reentry of the information of the data terminals. Microprocessor system 101 communicates via peripheral interface 404 to transmission facility interface 104, cross connect 102 and bridge 103. Peripheral interface 404 communicates to the transmission facility interface 102 to transfer time-slot map information as discussed hereinafter or in other words to allow a connection of a VTS port of the MLCT. Microprocessor system 101 communicates through peripheral interface 404 to cross-connect 102 to map the time multiplexed switches (TMS) for configuring the TMS output data links 603-1 through 603-N (FIG. 6) to contain the information shown in TABLE 3 below and to perform the video switch function by the use of N.times.N switch 602 (FIG. 6) as described below. The bridge 102 communication is also handled by the peripheral interface 404. Information transfer to bridge 103 includes VTS port assignment, conference set-up including the designation of the various connections to the VTS data links and whether conference rooms or MLCTs are connected to them. Communications interface 405 is used to provide a connection to serial data terminal connections 105-1 through 105-T, in one example T=5, which are used to communicate with the conference set-up operator, a reservation system, or a port system to handle the conference reservation from multiple locations and to perform maintenance operations on the system. The microprocessor system 101 functions may be divided into three distinct classes: maintenance, operational (video switches), and conference parameter management. It performs all communication and administrative functions for the MLCT. It has communication access to all major components of the system to perform conference set-up operations, maintenance functions, error recovery, transmission facility performance monitoring, and video switches upon request from bridge 103. Microprocessor system 101 is essentially identical to the arrangement described by A. J. Cirillo, L. F. Horney II and J. D. Moore in an article entitled, "DACS Microprocessor System", NTC'81, IEEE 1981 National Telecommunications Conference, Vol. 1, pages B1.3.1-B1.3.6, November, 1981.

Transmission Facility Interface

Details of transmission facility interface 104 are shown in simplified block diagram form in FIG. 5. It includes VTS ports 500-1 through 500-N, each of which includes a plurality of digroup circuits 501-1 through 501-R. As noted above, in this example two T1 lines are used for each of VTS ports 500-1 through 500-N and, therefore, two digroup circuits are used per VTS port. Again, the VTS ports connect transmission facility interface 104 via transmission facilities 10 (FIG. 1) to associate conference rooms and/or to associated MLCTs. Each of digroup circuits 501-1 through 501-R is connected via a corresponding one of data links 502-1 through 502-R to cross connect 102. Each of digroup circuits 501-1 through 501-R in a VTS port receives data from cross connection 102 on a shared data link, for example, via data link 108-1. Each digroup circuit in transmission facility interface 102 provides a read-write capability to microprocessor system 101 of all error source registers (not shown) and control registers (not shown). The error source registers relate to various internal hardware error detectors as well as to transmission facility related problems such as T1 framing errors, out-of-frame conditions, slips and carrier failure alarms (CFA). In addition to the DS-1 termination function, the digroup circuit implements the "time" portion of the time-space-time switching function of the MLCT. Its receiving section contains a line clock recovery circuit, a framer for recovery of the Ft framing bits, an elastic store, transmission facility error detectors and a time-slot interchanger (RTSI) (all not shown) to transform the T1 frame format to one compatible with that of the cross-connect, i.e., the cross connect data format of FIG. 3. Its transmitting section contains a second time-slot interchanger (TTSI) (not shown) and a DS-1 signal formatter (not shown) to convert the cross-connect data format to the DS-1 format.

The signal format provided by the digroup circuit to the cross-connect 102 is shown in FIG. 3. It consists of a frame of 256 time-slots, labeled time-slot 0 through time-slot 255. It is transported by three rails at a data rate of 8.192 Mb/sec each. Each time-slot contains 12 bits of information: 8 data bits, labeled D1 through D8, three spare bits, and a parity bit that provided odd parity over the 12 bits in the time slot and the eight-bit code representing the time-slot number. The RTSI may be configured to fill any of the 256 time slots with the received 24 words of the incoming T1 line. Similarly, the TTSI may choose any of the 256 time-slots (up to 24) and selectively place them in the outgoing T1 line.

In this example, the digroup circuits 502-1 through 502-R, where R=4, for VTS port 500-1 identify and format the incoming DS-1 signals. Specifically, digroup circuit 502-1 identifies the video control signals, c bit and audio signals in words 1, 2 and 3 and formats them in time slots 0, 1 and 2 in the cross connect frame format of FIG. 3. Similarly, it identifies the video information in words 4 through 24 and formats it into time slots 64 through 84 in the cross connect fram format of FIG. 3. Digroup circuit 502-2 identifes the video information in signal DS1 No. 2 and formats it into time slots 85 through 108 of the cross connect frame format. Digroup circuit 502-3, if used, identifies the video information in signal DS1 No. 3 and formats it into time slots 108 through 132 of the cross connect format. Finally, digroup circuit 502-4, if used, identifies the video information in signal DS1 No. 4 and formats it into time slots 133 through 156 of the cross connect format. For VTS port 500-2 the only difference from VTS port 500-1 is in the formatting of the video control signal, c-bit and audio signals. In this example, this information is formatted into time slots 4, 5 and 6 of the cross connect frame format.

This formatting is shown in FIG. 9 relating to the cross connect 102 frame formats. There is shown that for VTS port 500-3 the video control, c-bit and audio information is in time slots 8, 9 and 10, for VTS port 500-4 in time slots 12, 13 and 14, for VTS ports 500-4 in time slots 16, 17 and 18 and for VTS port 6, i.e., N=6, in time slots 20, 21 and 22. These formatted signals are supplied to cross connect 102.

Such digroup circuits are known in the art, see for example the digroup circuit described by R. P. Abbott and D. C. Koehler in an article entitled, "Digital Access and Cross-Connect System --System Architecture", NTC'81, IEEE 1981 National Telecommunication Conference, Vol. 1, pages B1.2.1-B1.2.7 at page B1.2.2., November, 1981.

VTS ports 500 can be assigned in a conference as follows:

1. Both the input and output data links of a VTS port are assigned to a room;

2. The output data link of the VTS port is assigned as a so-called broadcast link, i.e., the outgoing signal is supplied to all other MLCTs in the conference; and

3. The input data link of the VTS port is assigned as a MLCT link, i.e., it receives an outgoing broadcast signal from another MLCT.

Cross Connect

Details of cross-connect 102 are shown in simplifed block diagram form in FIG. 6. Cross-connect 102 provides the space switching function of the MLCT time-space-time switching function. Cross-connect 102 includes time-multiplexed switches (TMS) 601-1 through 601-N and N.times.N switch 602. Time multiplexed switches 601-1 through 601-N are assigned on a one-to-one basis to VTS ports 500-1 through 500-N, respectively, in transmission facility interface 104. Data links 107-1 through 107-N are supplied from transmission interface 104 to TMS 601-1 through 601-N, respectively. Also supplied to TMS 601-1 through 601-N are data links 109-1 through 109-N, respectively. Data links 109-1 through 109-N carry processed information from bridge 103 relating to associated VTS ports 500-1 through 500-N, respectively. Each of TMS 601-1 through TMS 601-N selects on a per time slot basis information from its input data links and combines the information to generate at its output data link another 256 time-slot composite signal frame containing the time slot selection that the TMS is programmed to produce. It is important to note that the video information from a conference location is included in several incoming signals and that the TMS combines the information into the one composite signal. This combining of all the video information from a corresponding conference location into one composite signal enables, in accordance with an aspect of the invention, a rapid switch of the video being viewed. Outputs from TMS 601-1 through 601-N are controllably selected by N.times.N switch 602 and supplied via 108-1 through 108-N, respectively, to transmissiion facility interface 104 for transmission on T1 transmission facilities to transmission facility 10 to be routed to appropriate ones of the conference rooms and/or other MLCTs, TMS 601-1 through TMS 601-N and N.times.N switch 602 are controlled by microprocessor system 101 to realize a desired video and audio switch to the ports. Through this arrangement anyone of the composite signals from TMS 601-1 through TMS 601-N is selectable via switch 602 for transmission to any one of VTS ports 500.

It is noted that each VTS port receives an audio mix from all the other ports. Thus, the audio that must accompany the video to each port is a different mix. The appropriate audio mix and video are switched to the VTS ports by employing cross-connect 102. Error free, i.e., non-disruptive switching is realized, in accordance with an aspect of the invention, by employing TMS 601-1 through 601-N to each generate a so-called composite audio and video signal. The composite signal includes all the video information from a room associated with the corresponding VTS port and the audio mixes generated by bridge 103 to be transmitted to all of the rooms and partial audio sums to be transmitted to other MLCTs. Cross connect 102 time slot assignments of the signals generated at the outputs of TMS 601-1 through 601-N are shown in FIG. 9. Accordingly, shown in FIG. 9 are the composite signals combined in cross-connect 102 for each of VTS ports 500-1 through 500-N. Thus, for VTS port 500-1 the audio mix to VTS port 1 is in fixed time slots 32, 33 and 34 as supplied from bridge output circuit 1005, the audio mix to VITS port 500-2 is in fixed time slots 36, 37 and 38, the audio mix to VTS port 500-3 is inserted into fixed time slots 40, 41 and 42, the audio mix to VTS port 500-9 is in fixed time-slots 44, 45 and 46, the audio mix to VTS port 500-5 is in fixed time slots 48, 49 and, 50 and finally, the audio mix to VTS port 500-6 is in time slots 52, 53 and 54. The video from VTS port 500-1 is combined into time slots 64 through 156. The audio from VTS port 500-1 which is in time slots 0, 1 and 2 is supplied to bridge 103 via 110-1 to be appropriately mixed with the audio from the other VTS ports and, then, supplied via 109-1 from bridge 103 to TMS 601-1 in the appropriate fixed time slots in the composite signals associated with VTS port 500-1. The composite signals associated with VTS ports 500-2 through 500-6 are similarly obtained as shown in FIG. 9. Consequently, when the video from anyone of the VTS ports and, hence, the associated conference room is switched via N.times.N switch 602 to anyone of the other conference rooms, the proper audio mix for the specific conference rooms is present and obtained by the MLCT selecting the audio mix in the fixed time slots assigned to the associated conference rooms. The functions of TMS 600 and switch 602 may be realized by employing dual multiplexers of a type described in the article entitled, "Digital Access and Cross-Connect System-System Architecture" noted above.

FIG. 7 shows in simplifed block diagram form details of time multiplexed switches 601 of cross-connect 102 (FIG. 6). Accordingly, shown are (R+1).times.1 data selector 701, TMS control memory 702 and time slot counter 703. Selector 701 is controlled by control codes stored in control memory 702. The control codes are written into memory 702 from microprocessor system 101 and include the time slot switching information for the time multiplexed switch for an assigned VTS port. Once the control information is written into control memory 702 no further interaction with microprocessor system 101 is required until a new data link selection is made. Control memory 702 is addressed by time slot counter 703 which generates a sequentially incrementing modulo-256 counter signal synchronized to the time slot occurrences of the cross-connect data format as shown in FIG. 3.

FIG. 8 shows in simplified block diagram form details of N.times.N switch 602 of cross-connect 102 FIG. 6. Switch 602 includes N.times.1 data selectors 801-1 through 801-N which are controlled by control registers 802-1 through 802-N, respectively. Each of outputs 108-1 through 108-N of data selectors 801-1 through 801-N, respectively, is connected to an associated one of VTS ports 500-1 through 500-N (FIG. 5). Outputs 603-1 through 603-N from time multiplexed switches 601-1 through 601-N (FIG. 6), respectively, are supplied to respective inputs of selectors 801-1 through 801-N. Switching commands are supplied from microprocessor system 101 via control lines 605-1 through 605-N to control registers 802-1 through 802-N, respectively. In response to the switching commands each of selectors 801-N through 801-N selects an appropriate one to its inputs and provides it to its associated VTS port in transmission facility interface 104. Consequently, any one of the composite signals supplied from time multiplexed switches 601 can be selected for transmission to any one of the VTS ports 500. The input selection is controlled to occur at the boundary between the cross-connect data format frame in order to prevent any mixing of information from different inputs within a given frame.

In summary, the operation of cross-connect 102 is realizing nondisruptive audio and rapid video switching, in accordance with an aspect of the invention, is such that the first 3 words of DS-1 No. 1 of all N incoming VTS signals are identified by and formatted into predetermined time slots by digroups circuits 501 and sent via TMS 601-1 through 601-N to bridge 103 for processing the audio and control information and for performing subbyte bit manipulation of video-related signaling bits located in the first word. All other words containing video information are formatted into a composite video signal and provided to N.times.N switch 602 for the video switching function of the MLCT along with processed audio, control, and video related information are supplied by each of data links 109-1 through 109-N from bridge 103. After any selection is made by N.times.N switch 602, it is up to the particular one of digroup circuits 501 (FIG. 5) to choose the necessary timeslots to form the corresponding outgoing VTS signal.

This implies, as will be seen in the following, that the processed audio and control signals generated in bridge 103 must appear on all data links 603 presented to N.times.N switch 602 in order to affect only video information when the switch state is changed. The time-slot assignment has been chosen, along with other system features, so that after a conference configuration has been decided and set-up, the time-space-time switching configuration is static except for N.times.N switch 602. N.times.N switch 602 is the only switching element whose configuration is dynamic, i.e., during video switches. The other switching elements remain constant until a new conference configuration is required, i.e., addition or deletion of a conference room or MLCT. This type of arrangement allows, in accordance with an aspect of the invention, very efficient and rapid video selection operations. In fact, not using the above method implies remapping one time-slot at a time of all the switching elements to perform a video switch thereby resulting in serious video selection speed degradations.

Table 1 shows the relative time-slot assignment of all information groups as they appear at the output of TMS 601-1 through 601-N. Entries of the form "vnwn" and "vnWn" represents a group of 3 timeslots each. The "Vn" entries represent a group of 21+(24.times.R) time-slots to accommodate the video information from each VTS port. The table is subdivided into two sections each pertaining to where the information is routed. Bridge 103, for example, has access in space and time to all audio and control inputs to the MLCT. Conversely, bridge 103 provides N copies of the processed audio and control information mixed with video portions pertinent to each VTS port. The transmit sections of digroup circuits (DC) 500 in the transmission facility interface 104 (FIG. 4) choose the time-slots under the "VTS Output Contribution" to construct the word pattern in the R outgoing T1 lines Once this selection is performed, no other interaction is done with the DC TTSI. When a "space" switch is performed by N.times.N switch 602 (FIG. 6) it represents a vertical movement of the "VTS Output Contribution" section of the time-slot assignment table which affects only video information.

                                      TABLE 1
    __________________________________________________________________________
    Cross-Connect Time-Slot Assignment
    Time-Slot Assignment
    VTS Input Contribution Bridge 103 Contribution
     To Bridge 103       VTS Output Contribution
    __________________________________________________________________________
    L 1 v1w1
            --  --  --  v1 v1W1
                               v1W2
                                   V1Wn
                                       v1WN
    I 2 --  v2W2
                --  --  V2 v2W1
                               v2W2
                                   v2Wn
                                       v2WN
    N n --  --  vnwn
                    --  Vn vnW1
                               vnW2
                                   vnWn
                                       vnWN
    K N --  --  --  vNwN
                        VN vNW1
                               vNW2
                                   vNWn
                                       vNWN
    LEGENDA
    __________________________________________________________________________
     vn Video in word 1 of DS1 No. 1 from VTS Input Port n
     Vn Video from VTS Input Port n
     wn Control and Audio from VTS Input Port n
     Wn Control and Bridged Audio to VTS Output Port n
     -- Unassigned TimeSlot Group

                  TABLE 2
    ______________________________________
    VTS Data Format: Audio Group
    A-bit    Mu-law     Description
    ______________________________________
    A1   A9      M0         Mantissa Least Significant Bit
    A2   A10     M1
    A3   A11     M2
    A4   A12     M3         Mantissa Most Significant Bit
    A5   A13     L0         Cord Least Significant Bit
    A6   A14     L1
    A7   A15     L2         Cord Most Significant Bit
    A8   A16     S          Sign
    ______________________________________

                  TABLE 3
    ______________________________________
    VTS Data Format: Audio Decipherment Group
    ______________________________________
    Odd Numbered D-bits
    n    Counter Contents  Check Bits
    ______________________________________
    0    L1     L2      L3   L4    R1   R2    R3   R4
    1    L5     L6      L7   L8    R5   R6    R7   R8
    2    L9     L10     L11  L12   R9   R10   R11  R12
    3    L13    L14     L15  L16   R13  R14   R15  R16
    4    L17    L18     L19  L20   R17  R18   R19  R20
    5    L21    L22     L23  L24   R21  R22   R23  R24
    6    L25    L26     L27  L28   R25  R26   R27  R28
    7    L29    L30     L31  L32   R29  R30   R31  R32
    ______________________________________
    R4n+1 = L4n+1 .sym. L4n+2 .sym. L4n+3
    R4n+2 = L4n+2 .sym. L4n+3 .sym. L4n+4
    R4n+3 = L4n+1 .sym. L4n+2 .sym. L4n+4
    R4n+4 = L4n+1 .sym. L4n+3 .sym. L4n+4
    ______________________________________
    Even Numbered D-bits
    n     S1    S2       S3  S4     S5  S6    P   FAn
    ______________________________________
    0     1     0        0   1      1   1     P   0
    1     1     0        0   1      1   1     P   0
    2     1     0        0   1      1   1     P   0
    3     1     0        0   1      1   1     P   0
    4     1     0        0   1      1   1     P   1
    5     1     0        0   1      1   1     P   1
    6     1     0        0   1      1   1     P   1
    7     1     0        0   1      1   1     P   1
    ______________________________________
     The symbol .sym. indicates an "Exclusive OR" function.

                                      TABLE 4
    __________________________________________________________________________
                 Received
                 Counter   Counter
                                 Cipher Byte
                                           Flow
       D-bit K   Contents  Encryption
                                 Selection to
                                           Chart
    K  Processing
                 Bookkeeping
                           Request
                                 Decrypt Audio
                                           Node
    __________________________________________________________________________
    001
       RTMPO=D=L1          ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (1,[Ct]1)
    002
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    003
       LRTMP1=D=L2               CTADDR=*[Ct2]0
                                           LR
    004
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    005
       LRTMP2=D=L3         ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (2,[Ct]0)
    006
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    007
       LRTMP3=D=L4               CTADDR=*[Ct2]1
                                           LR
    008
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    009
       LRTMP4=D=R1         EN CRQ
                                 CTADDR=*[Ct0]0
                                           LR
                           (3,[Ct]1)
    010
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    011
       LRTMP5=D=R2               CTADDR=*[Ct2]0
                                           LR
    012
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    013
       LRTMP6=D=R3
                 NXTPTO=   ENCRQ CTADDR=*[ Ct0]1
                                           LR
                 HAM(LRTMP)
                           (4,[Ct]0)
    014
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    015                          CTADDR=*[Ct2]1
                                           LR
    016
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    017
       LRTMPO=D=L5         ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (5,[Ct]1)
    018
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    019
       LRTMP1=D=L6               CTADDR=*[Ct2]0
                                           LR
    020
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    021
       LRTMP2=D=L7         ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (6,[Ct]0)
    022
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    023
       LRTMP3=D=L8               CTADDR=*[Ct2]1
                                           LR
    024
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    025
       LRTMP4=D=R5         ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (7,[Ct]1)
    026
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    027
       LRTMP5=D=R6               CTADDR=*[Ct2]0
                                           LR
    028
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    029
       LRTMP6=D=R7
                 NXTPT1=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (8,[Ct]0)
    030
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    031                          CTADDR=*[Ct2]1
                                           LR
    032
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    033
       LRTMPO=D=L9         ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (9,[Ct]1)
    034
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    035
       LRTMP1=D=L10              CTADDR=*[Ct2]0
                                           LR
    036
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    037
       LRTMP2=D=L11        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (10,[Ct]0)
    038
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    039
       LRTMP3=D=L12              CTADDR=*[Ct2]1
                                           LR
    040
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    041
       LRTMP4=D=R9         ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (11,[Ct]1)
    042
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    043
       LRTMP5=D=R10              CTADDR=*[Ct2]0
                                           LR
    044
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    045
       LRTMP6=D=R11
                 NXTPT2=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (12,[Ct]0)
    046
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    047                          CTADDR=*[Ct2]1
                                           LR
    048
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    049
       LRTMPO=D=L13        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (13,[Ct]1)
    050
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    051
       LRTMP1=D=L14              CTADDR=*[Ct2]0
                                           LR
    052
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    053
       LRTMP2=D=L15        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (14,[Ct]0)
    054
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    055
       LRTMP3=D=L16              CTADDR=*[Ct2]1
                                           LR
    056
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    057
       LRTMP4=D=R13        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (15,[Ct]1)
    058
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    059
       LRTMP5=D=R14              CTADDR=*[Ct2]0
                                           LR
    060
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    061
       LRTMP6=D=R15
                 NXTPT3=   ENCRQ CTADDR=*[ Ct0]1
                                           LR
                 HAM(LRTMP)
                           (16,[Ct]0)
    062
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    063                          CTADDR=*[Ct2]1
                                           LR
    064
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    065
       LRTMPO=D=L17        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (17,[Ct]1)
    066
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    067
       LRIMP1=D=L18              CTADDR=*[Ct2]0
                                           LR
    068
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    069
       LRTMP2=D=L19        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (18,[Ct]0)
    070
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    071
       LRTMP3=D=L20              CTADDR=*[Ct2]1
                                           LR
    072
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    073
       LRTMP4=D=R17        ENCRQ CTADDR=*[Ct0]0



                                           LR
                           (19,[Ct]1)
    074
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    075
       LRTMP5=D=R18              CTADDR=*[Ct2]0
                                           LR
    076
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    077
       LRTMP6=D=R19
                 NXTPT4=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (20,[Ct]0)
    078
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    079                          CTADDR=*[Ct2]1
                                           LR
    080
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    081
       LRTMPO=D=L21        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (21,[Ct]1)
    082
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    083
       LRTMP1=D=L22              CTADDR=*[Ct2]0
                                           LR
    084
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    085
       LRTMP2=D=L23        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (22,[Ct]0)
    086
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    087
       LRTMP3=D=L24              CTADDR=*[Ct2]1
                                           LR
    088
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    089
       LRTMP4=D=R21        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (23,[Ct]1)
    090
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    091
       LRTMP5=D=R22              CTADDR=*[Ct2]0
                                           LR
    092
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    093
       LRTMP6=D=R23
                 NXTPT5=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (24,[Ct]0)
    094
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    095                          CTADDR=*[Ct2]1
                                           LR
    096
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    097
       LRTMPO=D=L25        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (25,[Ct]1)
    098
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    099
       LRTMP1=D=L26              CTADDR=*[Ct2]0
                                           LR
    100
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    101
       LRTMP2=D=L27        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (26,[Ct]0)
    102
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    103
       LRTMP3=D=L28              CTADDR=*[Ct2]1
                                           LR
    104
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    105
       LRTMP4=D=R25        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (27,[Ct]1)
    106
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    107
       LRTMP5=D=R26              CTADDR=*[Ct2]0
                                           LR
    108
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    109
       LRTMP6=D=R23
                 NXTPT6=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (28,[Ct]0)
    110
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    111                          CTADDR=*[Ct2]1
                                           LR
    112
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    113
       LRTMPO=D=L29        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (29,[Ct]1)
    114
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    115
       LRTMP1=D=L30              CTADDR=*[Ct2]0
                                           LR
    116
       FRAMING=D+1               CTADDR=*[Ct3]0
                                           S
    117
       LRTMP2=D=L31        ENCRQ CTADDR=*[Ct0]1
                                           LR
                           (30,[Ct]0)
    118
       FRAMING=D+1               CTADDR=*[Ct1]1
                                           S
    119
       LRTMP3=D=L32              CTADDR=*[Ct2]1
                                           LR
    120
       FRAMING=D+0               CTADDR=*[Ct3]1
                                           S
    121
       LRTMP4=D=R29        ENCRQ CTADDR=*[Ct0]0
                                           LR
                           (31,[Ct]1)
    122
       FRAMING=D+0               CTADDR=*[Ct1]0
                                           S
    123
       LRTMP5=D=R30              CTADDR=*[Ct2]0
                                           LR
    124
       FRAMING=D+0               CTADDR=*[Ct3]0
                                           S
    125
       LRTMP6=D=R31
                 NXTPT6=   ENCRQ CTADDR=*[Ct0]1
                                           LR
                 HAM(LRTMP)
                           (0,[Ct] 0)
                 PRSPT=NXTPT
    126
       PARITY=D                  CTADDR=*[Ct1]1
                                           P
    127                          CTADDR=*[Ct2]1
                                           LR
    128
       FRAMING=D+1               CTADDR=*[Ct3]1
                                           S
    __________________________________________________________________________